• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.671-674
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• 2009

We design a low-power and low-area asynchronous EEPROM of 256 bits used in a passive UHF RFID tag chip. For a low-power solution, we use a supply voltage of 1.8V and design a Dickson charge pump using N-type Schottky diodes with a low-voltage characteristic. And we use an asynchronous interface and a separate I/O method for a low-area solution of the peripheral circuit of the designed EEPROM. And we design a Dickson charge pump using N-type Schottky diodes to reduce an area of DC-DC converter. The layout area of the designed EEPROM of 256 bits with an array of 16 rows and 16 columns using $0.18{\mu}m$ EEPROM process is $311.66{\times}490.59{\mu}m^2$.

• Tribology and Lubricants
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• v.22 no.2
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• pp.59-65
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• 2006

In hard disk drives as the head to disk spacing continues to decrease to facilitate recording densities, slider disk interactions have become much more severe due to direct contact of head and disk surfaces in both start/stop and flying cases. The slider disk interaction in CSS (contact-start-stop) mode is an important source of particle generation and tribocharge build-up. The tribocharge build-up in the slider disk interface can cause ESD (electrostatic discharge) damage. In turn, ESD can cause severe melting damage to MR or GMR heads. The spindle speed of typical hard disk drives has increased in recent years from 5400 rpm to 15000 rpm and even higher speeds are anticipated in the near future. And the increasing disk velocity leads to increasing disk acceleration and this might affect the tribocharging phenomena of the slider/disk interface. We investigated the tribocurrent/voltage build-up generated in HDD, operating at increasing disk accelerations. In addition, we examined the effects with relative humidity conditions and rest time. We found that the tribocurrent/voltage was generated during pico-slider/disk interaction and its level was about $3\sim16pA$ and $0.1\sim0.3V$, respectively. Tribocurrent/voltage build-up was reduced with increasing disk acceleration. Higher humidity conditions $(75\sim80%)$ produced lower levels tribovoltage/current. Therefore, a higher tribocharge is expected at a lower disk acceleration and lower relative humidity condition. Rest time affected the charge build-up at the slider-disk interface. The degree of tribocharge build-up increased with increasing rest time.

• Journal of the Korean institute of surface engineering
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• v.51 no.4
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• pp.243-248
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• 2018

All solid state thin film batteries with two types of cell structure, Pt / $LiCoO_2$ / LiPON / Cu and Pt / $LiCoO_2$ / LiPON / $LiCoO_2$ / Cu, are prepared and their electrochemical performances are investigated to evaluate the effect of $LiCoO_2$ interlayer at the interface of LiPON / Cu. The crystallinity of the deposited $LiCoO_2$ thin films is confirmed by XRD and Raman analysis. The crystalline $LiCoO_2$ cathode thin film is obtained and $LiCoO_2$ as the interlayer appears to be amorphous. The surface morphology of Cu current collector after cycling of the batteries is observed by AFM. The presence of a 10 nm-thick layer of $LiCoO_2$ at the interface of LiPON / Cu enhances the interfacial adhesion and reduces the interfacial resistance. As a result, Li plating / stripping at the interface of LiPON / Cu during charge/discharge reaction takes place more uniformly on Cu current collector, while without the interlayer of $LiCoO_2$ at the interface of LiPON / Cu, the Li plating / stripping is localized on current collector. The thin film batteries with the interlayer of $LiCoO_2$ at the interface of LiPON / Cu exhibits enhanced initial coulombic efficiency, reversible capacity and cycling stability. The thickness of the anode current collector Cu also appears to be crucial for electrochemical performances of all solid state thin film batteries.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.92-92
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• 2014

Recently, many state-of-art spectroscopy techniques are used to unravel the mysteries of condensed matters. And numerous heterostructures have provided a new avenue to search for new emergent phenomena. Especially, near the interface, various forms of symmetry-breaking can appear, which induces many novel phenomena. Although these intriguing phenomena can be emerged at the interface, by using conventional measurement techniques, the experimental investigations have been limited due to the buried nature of interface. One of the ways to overcome this limitation is in situ investigation of the layer-by-layer evolution of the electronic structure with increasing of the thickness. Namely, with very thin layer, we can measure the electronic structure strongly affected by the interface effect, but with thick layer, the bulk property becomes strong. Angle-resolved photoemission spectroscopy (ARPES) is powerful tool to directly obtain electronic structure, and it is very surface sensitive. Thus, the layer-by-layer evolution of the electronic structure in oxide heterostructure can be investigated by using in situ ARPES. LaNiO3 (LNO) heterostructures have recently attracted much attention due to theoretical predictions for many intriguing quantum phenomena. The theories suggest that, by tuning external parameters such as misfit strain and dimensionality in LNO heterostructure, the latent orders, which is absent in bulk, including charge disproportionation, spin-density-wave order and Mott insulator, could be emerged in LNO heterostructure. Here, we performed in situ ARPES studies on LNO films with varying the misfit strain and thickness. (1) By using LaAlO3 (-1.3%), NdGaO3 (+0.3%), and SrTiO3 (+1.7%) substrates, we could obtain LNO films under compressive strain, nearly strain-free, and tensile strain, respectively. As strain state changes from compressive to tensile, the Ni eg bands are rearranged and cross the Fermi level, which induces a change of Fermi surface (FS) topology. Additionally, two different FS superstructures are observed depending on strain states, which are attributed to signatures of latent charge and spin orderings in LNO films. (2) We also deposited LNO ultrathin films under tensile strain with thickness between 1 and 10 unit-cells. We found that the Fermi surface nesting effect becomes strong in two-dimensions and significantly enhances spin-density-wave order. The further details are discussed more in presentation. This work was collaborated with Hyang Keun Yoo, Seung Ill Hyun, Eli Rotenberg, Ji Hoon Shim, Young Jun Chang and Hyeong-Do Kim.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.99-99
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• 2013

In this talk, I will present two research works in progress, which are: i) mapping of piezoelectric polarization and associated charge density distribution in the heteroepitaxial InGaN/GaN multi-quantum well (MQW) structure of a light emitting diode (LED) by using inline electron holography and ii) in-situ observation of the polarization switching process of an ferroelectric Pb(Zr1-x,Tix)O3 (PZT) thin film capacitor under an applied electric field in transmission electron microscope (TEM). In the first part, I will show that strain as well as total charge density distributions can be mapped quantitatively across all the functional layers constituting a LED, including n-type GaN, InGaN/GaN MQWs, and p-type GaN with sub-nm spatial resolution (~0.8 nm) by using inline electron holography. The experimentally obtained strain maps were verified by comparison with finite element method simulations and confirmed that not only InGaN QWs (2.5 nm in thickness) but also GaN QBs (10 nm in thickness) in the MQW structure are strained complementary to accommodate the lattice misfit strain. Because of this complementary strain of GaN QBs, the strain gradient and also (piezoelectric) polarization gradient across the MQW changes more steeply than expected, resulting in more polarization charge density at the MQW interfaces than the typically expected value from the spontaneous polarization mismatch alone. By quantitative and comparative analysis of the total charge density map with the polarization charge map, we can clarify what extent of the polarization charges are compensated by the electrons supplied from the n-doped GaN QBs. Comparison with the simulated energy band diagrams with various screening parameters show that only 60% of the net polarization charges are compensated by the electrons from the GaN QBs, which results in the internal field of ~2.0 MV cm-1 across each pair of GaN/InGaN of the MQW structure. In the second part of my talk, I will present in-situ observations of the polarization switching process of a planar Ni/PZT/SrRuO3 capacitor using TEM. We observed the preferential, but asymmetric, nucleation and forward growth of switched c-domains at the PZT/electrode interfaces arising from the built-in electric field beneath each interface. The subsequent sideways growth was inhibited by the depolarization field due to the imperfect charge compensation at the counter electrode and preexisting a-domain walls, leading to asymmetric switching. It was found that the preexisting a-domains split into fine a- and c-domains constituting a $90^{\circ}$ stripe domain pattern during the $180^{\circ}$ polarization switching process, revealing that these domains also actively participated in the out-of-plane polarization switching. The real-time observations uncovered the origin of the switching asymmetry and further clarified the importance of charged domain walls and the interfaces with electrodes in the ferroelectric switching processes.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.265-270
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• 2017

4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.

• Korean Journal of Materials Research
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• v.23 no.8
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• pp.430-434
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• 2013

Quantum dots(QDs) with their tunable luminescence properties are uniquely suited for use as lumophores in light emitting device. We investigate the microstructural effect on the electroluminescence(EL). Here we report the use of inorganic semiconductors as robust charge transport layers, and demonstrate devices with light emission. We chose mechanically smooth and compositionally amorphous films to prevent electrical shorts. We grew semiconducting oxide films with low free-carrier concentrations to minimize quenching of the QD EL. The hole transport layer(HTL) and electron transport layer(ETL) were chosen to have carrier concentrations and energy-band offsets similar to the QDs so that electron and hole injection into the QD layer was balanced. For the ETL and the HTL, we selected a 40-nm-thick $ZnSnO_x$ with a resistivity of $10{\Omega}{\cdot}cm$, which show bright and uniform emission at a 10 V applied bias. Light emitting uniformity was improved by reducing the rpm of QD spin coating.At a QD concentration of 15.0 mg/mL, we observed bright and uniform electroluminescence at a 12 V applied bias. The significant decrease in QD luminescence can be attributed to the non-uniform QD layers. This suggests that we should control the interface between QD layers and charge transport layers to improve the electroluminescence.

• Journal of the Korean Ceramic Society
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• v.36 no.2
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• pp.172-177
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• 1999

Graphite and carbonaceous materials showed an excellent capability as a negative electrode in Li-ion batteries because Li-ion can be intercalated and de-intercalated reversibly within most carbonaceous materials of layered structure. Also, the electrochemical potential of Li-intercalated carbon anode is almost identical with that of Li metal. In the present study, mesocarbon microbeads(MCMB) were used as anode electrode and its properties of charge/discharge and interfacial reaction with electrolyte were studied by Potentiostat/Galvanostat test, FT-IR analysis, XRD and SEM. The passivation film of solid-state was formed as the interface between electrode and electrolyte as the cell reaction began and, once formed, became thicker with repeated charge/discharge process. Also, the relationship between the passivation film formed at the electrode interface and storage capacity was discussed.

• Transactions of the Korean hydrogen and new energy society
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• v.16 no.2
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• pp.142-149
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• 2005

[ $LiNiO_2$ ] was mixed with $TiO_2$ or ZnO for the preparation of a cathode. The electrochemical properties of the cathode were investigated and the effects of the addition of $TiO_2$ or ZnO were discussed. The first discharge capacity decreased as the quantity of the added $TiO_2$ or ZnO increased. It is probably due to the decrease in the area of reaction interface according to the increase in the amount of the added oxide. When 2wt.% and 5wt.% of oxides are added, the discharge capacity increased as the number of cycles increased. It is considered that this results from the increase in the area of reaction interface because the oxide is detached from the $LiNiO_2$ with the increase in the number of cycles. The 1wt.% $TiO_2$ or ZnO-added $LiNiO_2$ had a larger first charge capacity than $LiNiO_2$. This is considered to result from the deintercalation of Li ions in the Ni sites along with the Li ions in the Li sites.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.287-287
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• 2011

ITRS(international technology roadmap for semiconductors)에 따르면 MOS (metal-oxide-semiconductor)의 CD(critical dimension)가 45 nm node이하로 줄어들면서 poly-Si/SiO2를 대체할 수 있는 poly-Si/metal gate/high-k dielectric이 대두되고 있다. 일반적으로 metal gate를 식각시 정확한 CD를 형성시키기 위해서 plasma를 이용한 RIE(reactive ion etching)를 사용하고 있지만 PIDs(plasma induced damages)의 하나인 PICD(plasma induced charging damage)의 발생이 문제가 되고 있다. PICD의 원인으로 plasma의 non-uniform으로 locally imbalanced한 ion과 electron이 PICC(plasma induced charging current)를 gate oxide에 발생시켜 gate oxide의 interface에 trap을 형성시키므로 그 결과 소자 특성 저하가 보고되고 있다. 그러므로 본 연구에서는 이에 차세대 MOS의 metal gate의 식각공정에 HDP(high density plasma)의 ICP(inductively coupled plasma) source를 이용한 중성빔 시스템을 사용하여 PICD를 줄일 수 있는 새로운 식각 공정에 대한 연구를 하였다. 식각공정조건으로 gas는 HBr 12 sccm (80%)와 Cl2 3 sccm (20%)와 power는 300 w를 사용하였고 200 eV의 에너지로 식각공정시 TEM(transmission electron microscopy)으로 TiN의 anisotropic한 형상을 볼 수 있었고 100 eV 이하의 에너지로 식각공정시 하부층인 HfO2와 높은 etch selectivity로 etch stop을 시킬 수 있었다. 실제 공정을 MOS의 metal gate에 적용시켜 metal gate/high-k dielectric CMOSFETs의 NCSU(North Carolina State University) CVC model로 effective electric field electron mobility를 구한 결과 electorn mobility의 증가를 볼 수 있었고 또한 mos parameter인 transconductance (Gm)의 증가를 볼 수 있었다. 그 원인으로 CP(Charge pumping) 1MHz로 gate oxide의 inteface의 분석 결과 이러한 결과가 gate oxide의 interface trap양의 감소로 개선으로 기인함을 확인할 수 있었다.