• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1286-1291
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• 2017

In this paper, we propose an indoor positioning system that makes use of the attenuation model for IEEE 802.11 Channel State Information (CSI) in order to determine its distance from an Access Point (AP) at a fixed position. With the use of CSI, we can mitigate the problems present in the use of Received Signal Strength Indicator (RSSI) data and increase the accuracy of the estimated mobile device's location. For the experiments we performed, we made use of the Intel 5300 Series Network Interface Card (NIC) in order to receive the channel frequency response. The Intel 5300 NIC differs from its counterparts in that it can obtain not only the RSSI but also the CSI between an access point and a mobile device. We can obtain the signal strengths and phases from subcarriers of a system which in turn means making use of this data in the estimation of a mobile device's position.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.10a
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• pp.123-126
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• 2015

본 연구에서는 클라우드 컴퓨팅 환경에서 운용되는 빅데이터 처리 프로그램에 ARM과 Intel의 하드웨어 보안이 어떠한 방식으로 적용되는지 비교 및 분석한다. 비교를 위하여 클라우드 서비스 모델을 제시하고, 실제 빅데이터 처리 알고리즘을 ARM과 Intel CPU를 갖춘 기기에서 작동시켜 수행 시간을 비교하였다. 연구 결과, ARMv7의 취약점인 하드웨어 암호화 모듈과 메모리 암호화의 부재를 도출하였고, 그 대안 방안으로서 FPGA(Field Programmable Gate Array)의 사용과 그 발전 방향을 제시하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2019.10a
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• pp.24-27
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• 2019

Meltdown, Spectre 등 하드웨어의 취약점을 이용하는 side-channel 공격이 주목을 받으면서 주요 microarchitecture 구조에 대한 철저한 이해의 필요성이 커지고 있다. 현대 마이크로프로세서에서 branch prediction이 갖는 중요성에도 불구하고 세부적인 사항은 거의 알려지지 않았으며 잠재적 공격에 대비하기 위해서는 반드시 현재 드러난 정보 이상의 detail을 탐구하기 위한 시도가 필요하다. 본 연구에서는 Performance Monitor Counter를 이용해 branch 명령어를 포함한 프로그램이 실행되는 동안 Branch Prediction Unit에 의한 misprediction 이벤트가 발생하는 횟수를 체크하여 인텔 하스웰, 스카이레이크에서 사용되는 branch target buffer의 구조를 파악하기 위한 실험을 수행하였다. 연구를 통해 해당 프로세서의 BTB의 size, number of way를 추정할 수 있었다.

• ETRI Journal
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• v.41 no.5
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• pp.619-625
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• 2019

In this paper, we propose an array pattern synthesis scheme using semidefinite programming (SDP) under array excitation power constraints. When an array pattern synthesis problem is formulated as an SDP problem, it is known that an additional rank-one constraint is generated inevitably and relaxed via semidefinite relaxation. If the solution to the relaxed SDP problem is not of rank one, then conventional SDP-based array pattern synthesis approaches fail to obtain optimal solutions because the additional rank-one constraint is not handled appropriately. To overcome this drawback, we adopted a bisection technique combined with a penalty function method. Numerical applications are presented to demonstrate the validity of the proposed scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.05a
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• pp.367-369
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• 2022

In this paper, the predicted results were confirmed by label mapping for each class while implementing multi-class image classification to confirm accurate results for images in which the trained model failed classification. A CNN model was constructed and trained using Kaggle's Intel Image Classification dataset, and the mapped label values of multiple classes of images and the values classified by the model were compared by label mapping the images of the test dataset.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.551-552
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• 2021

In this paper, we present a multi-class image scene classification method based on transformation learning. ImageNet classifies multiple classes of natural scene images by relying on pre-trained network models on large image datasets. In the experiment, we obtained excellent results by classifying the optimized ResNet model on Kaggle's Intel Image Classification data set.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.4
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• pp.2363-2369
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• 2014

The DVR system supports multiple cameras and should be able to receive images at 30 frames per channel in real time. Thus, The system is using Full-HD-grade Multiplexer and Hardware compression codec. In this paper, Describing the design and implementation for the 4-channel Full-HD-grade PC-based DVR using FPGA and GPU inside CPU without Multiplexer and Hardware codec. The existing DVR system for Full-HD-grade has drawbacks to acquire images of about only 20 frames per channel in real time. The system to acquire images of multiple channel in real time was designed using FPGA. The software for the system was implemented using Intel Media SDK. At the result of performance evaluation, It was satisfied all for the required conditions. The practicality of the system was confirmed as implementation the system without using hardware compression.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.395-406
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• 2007

Races in programs with OpenMP directives must be detected for debugging, because they may cause unexpected result by non-deterministic executions. But, Thread Checker of Intel corporation, a well-known existing tool for detecting the races, is not practical because this tool does not verify the existence of races and is known that the cost for race detection is too big. This paper presents a web-based tool which verify the existence of races with an optimal functionality and performance using the results from the property analysis of OpenMP program as well as the user requirements. Our tool is proved to be practical in the aspect of functionality and performance by experiments using synthetic programs, because the suggested tool can verify the existence of race and shows O(n) as the ratio of time consumption while Thread Checker can not verify the existence of race and shows $O(n^2)$ as the ratio, where n is the number of total accesses.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.348-356
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• 2016

The concept of license sales and its business model, which was introduced by Dolby 40 years ago, was implemented by Intel in the form of their promotional strategy "Intel Inside" and became the basis for Sharp's Plasmacluster. This strategy proved to be useful in securing stable profitability and competitiveness in the market, as it is designed to (i) license technology, which is an intangible asset, and (ii) combine various communication activities and management strategies to create a brand for the licensed technology. Although the concept and theory of "Technology Brand Marketing" are not fully understood, we know that they exist and are fully functional. Many corporations have branded their technology, though their intention may not be as clear as that of Dolby or Intel. This paper introduces the technology brands of advanced Japanese corporations in different sectors that have striven to earn credibility through "Technology Brand Marketing" and the possibilities this has opened up for them.

• Journal of Korea Technology Innovation Society
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• v.15 no.3
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• pp.500-532
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• 2012

This study analyzed the technology innovation strategies of knowledge-based companies in the semiconductor IP industry. The theoretical approaches of this study are to i) the creation, protection and utilization of knowledge and innovation, ii) value creation from innovation, iii) modularity, timing of market entry, and the emergence and competition of standard (dominant design). Based on the theoretical analysis, I presented exploratory research hypotheses. Ultimately, this study examined the proposed hypotheses by conducting case studies on the technology innovation strategy of two leading knowledge-based companies in the semiconductor IP industry: ARM and INTEL. First, knowledge-based companies entering in the early stage of the technology cycle select the vertically-integrated technology strategy because of lower access to complementary knowledge assets, and maintain the vertically-integrated technology strategy despite the environmental change-driven differentiation of industry's value chain. Second, knowledge-based companies entering in the later stage of the technology cycle prefer the contract-based technology strategy because of its increased accessibility to complementary knowledge assets, and choose a different path of innovation strategies depending on whether their asset has the feature of discontinuity or not.