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Effect of Microkernel Structure on Cache Memory Performance (마이크로커널 구조가 캐시 메모리의 성능에 미치는 영향)

  • Chang, Moon-Seok;Koh, Kern
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.1
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    • pp.68-80
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    • 2000
  • The modern software technology toward modularization has changed the cache accessing behavior dramatically. Many modern operating systems are also departing from the past monolithic structure toward the highly modularized structure referred to as microkernel. Microkernel-based operating systems are more portable and extensible, but are likely to have worse performance. This paper quantitatively analyzes the effect of microkernel structure on cache memory to identify the primary factor for its performance degradation. Through the experiment performed on a Intel Pentium Pro processor platform, we found that the microkernel structure suffers from remarkably higher misses for L1, L2 cache and TLB than the monolithic one does. We also found that the performance of a microkernel is more dependent on the efficiency of cache memory than IPC. Finally, we found that these results come from the effect of frequent context switches mainly caused by the structural feature of a microkernel.

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Fast Booting of Linux Kernel using Dynamic IDE Device Probing Scheme (동적 IDE 장치 검사 기법을 이용한 리눅스 커널의 빠른 부팅)

  • Kim, Young-Ju
    • The Journal of the Korea Contents Association
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    • v.7 no.1
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    • pp.139-146
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    • 2007
  • Most of embedded systems have been developed practically based on the PC platform equipped with Intel x86 CPU since it is able to reduce the total time for product development and improve the reliability of product by making use of a variety of solutions developed for a long time in the PC environment. Also, embedded systems based on PC-platform mainly use a high-capacity hard disk as data storage device for applications intending to store multimedia data. Recently, while the capacity of hard disk is increasing rapidly, the start-up ready time of hard disk is growing longer more than 30 seconds. The lengthened start-up ready time may delay the booting time of embedded system seriously, weighting users down with inconvenience. This paper proposes the refined system architecture and the dynamic IDE device probing method for fast booting of linux kernel in the embedded system based on PC platform with high-capacity hard disks, and the performance of proposed methods is evaluated and presented.

Efficient Hardware Transactional Memory Scheme for Processing Transactions in Multi-core In-Memory Environment (멀티코어 인메모리 환경에서 트랜잭션을 처리하기 위한 효율적인 HTM 기법)

  • Jang, Yeonwoo;Kang, Moonhwan;Yoon, Min;Chang, Jaewoo
    • KIISE Transactions on Computing Practices
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    • v.23 no.8
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    • pp.466-472
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    • 2017
  • Hardware Transactional Memory (HTM) has greatly changed the parallel programming paradigm for transaction processing. Since Intel has recently proposed Transactional Synchronization Extension (TSX), a number of studies based on HTM have been conducted. However, the existing studies support conflict prediction for a single cause of the transaction processing and provide a standardized TSX environment for all workloads. To solve the problems, we propose an efficient hardware transactional memory scheme for processing transactions in multi-core in-memory environment. First, the proposed scheme determines whether to use Software Transactional Memory (STM) or the serial execution as a fallback path of HTM by using a prediction matrix to collect the information of previously executed transactions. Second, the proposed scheme performs efficient transaction processing according to the characteristic of a given workload by providing a retry policy based on machine learning algorithms. Finally, through the experimental performance evaluation using Stanford transactional applications for multi-processing (STAMP), the proposed scheme shows 10~20% better performance than the existing schemes.

THE ANALYSIS ON SPACE RADIATION ENVIRONMENT AND EFFECT OF THE KOMPSAT-2 SPACECRAFT(II): SINGLE EVENT EFFECT (아리랑 2호의 방사능 환경 및 영향에 관한 분석(II)- SINGLE EVENT 영향 중심으로 -)

  • 백명진;김대영;김학정
    • Journal of Astronomy and Space Sciences
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    • v.18 no.2
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    • pp.163-173
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    • 2001
  • In this paper, space radiation environment and single event effect(SEE) have been analyzed for the KOMPSAT-2 operational orbit. As spacecraft external and internal space environment, trapped proton, SEP(solar energetic particle) and GCR(galactic cosmic ray) high energy Protons and heavy ions spectrums are analyzed. Finally, SEU and SEL rate prediction has been performed for the Intel 80386 microprocessor CPU that is planned to be used in the KOMPSAT-2. As the estimation results, under nominal operational condition, it is predicted that trapped proton and high energetic proton induced SBU effect will not occur. But, it is predicted that heavy ion induced SEU can occur several times during KOMPSAT-2 3-year mission operation. KOMPSAT-2 has been implementing system level design to mitigate SEU occurrence using processor CPU error detection function of the on-board flight software.

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Wireless Control System Using Spherical Camera (구형체 카메라를 이용한 무선 관제 시스템)

  • Jang, Jae-min;Shin, Soo Young;Ji, Yong-ju;Chae, Seog
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.4
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    • pp.461-466
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    • 2016
  • In this paper, a capsule body shaped surveillance/monitoring device is developed. The device includes a camera and GPS module to transmit live video data and real time GPS coordinates respectively using the Intel Edison module. A control application is developed for the smart phones and tablets to wirelessly view the live video stream and location of the capsule device and also to switch between the multiple capsule devices installed at different locations. The coordination between the developed device and the smart phone / tablet is done using the wireless function of the Intel Edison module.

Implementation of counterfeit banknote detection counter using RTOS (RTOS를 이용한 위폐검출 계수기의 구현)

  • 정원근;신태민;이건기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.2
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    • pp.364-370
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    • 2002
  • A banknote counter is a machine that automates counting the money in some agencies to treat much banknotes as well as general banking agencies. The banknote counter materialized in this paper is the machine that adds the function of banknote sorting, detecting plural banknote and detecting counterfeit banknote to an existing banknote counter. The technique of sensor signal processing are used for banknote sorting. The technique of sensor application and data processing are used for detecting counterfeit banknote. The technique of precision equipment design and microprocessor application are used for high speed count. Software improved in debugging and difficulties to link with additional hardware. It was materialized through effective control algorithm and real-time signal processing with C-language on the basis of RTOS(real-time operating system) Photodiode, its applications and a magnetic resistance sensor are used as a sensor device with regard to hardware cost -cutting and process velocity. PCF80C552-24 of Philips using Intel I8051 core is used as a control microprocessor. As the results so far achieved, counterfeit banknotes made by the use of a color duplicator and a color Printer, are distinguished from real banknotes through mixing an optical with a magnetic sensor. and, in case that there are some different banknotes while counting, it is prevented for them to be counted without discriminating from the same kind of banknotes in addition to the fu notion of banknote sorting.

RFID Library Management System base on Embedded System (임베디드 기반의 RFID 도서관리 시스템)

  • Jung, Won-Soo;Park, Yong-Min;Oh, Young-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.4
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    • pp.72-79
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    • 2007
  • This paper is an embedded system using the X-Hyper Intel PXA255 ARM CPU that base of the Linux operation system. This system applies tag information reading through RFID leader to Library executive system and designed and embody RFID middleware. The RFID middleware is consisted of RFID module, ARM processor and RS-232 interface. The RFID module is used to be inputted user and books information and RS-232 interface pass information by RFID middleware. Also, This system is embodied by specific Library management system using embedded exclusive use ARM processor. In this paper introduces concept and action principle of RFID middleware and uses Qt/Embedded and embodied manless loaning and return system.

A Study on Automatic Transmission System of Disasters Alarm by Using Wire and Wireless Communication Network - Using by 16bit Microprocessor(Intel 80c196kc) Controller - (유무선통신망을 이용한 재해감지 자동송출시스템에 관한 연구 - 16bit 마이크로프로세서(Intel 80c196kc) 적용 및 응용 -)

  • Kwak, Dong-Kurl;Choi, Shin-Hyeong;Jung, Do-Young
    • Fire Science and Engineering
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    • v.20 no.1 s.61
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    • pp.23-27
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    • 2006
  • With the development of the today's advanced industry civilization, We are always inhering a safety frigidity about disasters of various kinds when and where we may happen. The fires and disasters to be enlarged day by day are reported everyday through the mass communication. Therefore, a prevention countermeasure about the every kind fire and disaster is above all important along the social and the days requirement. As a kind of such countermeasure, this paper is proposed about automatic transmission system of disasters alarm by using wire and wireless communication network. The automatic transmission system prevents the unexpected fire or disaster from a sudden occurrence at the house, industrial field or at the place without the human. The proposed system has the characteristic of high precision and high response speed comparing with conventional system. Also, as the proposed system is small size and lightweight, the users have economic advantage and simply install the system.

Hologram based Internet of Signage Design Using Raspberry Pi

  • Timur, Khudaybergenov;Han, Jungdo;Cha, Jae-Sang
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.12
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    • pp.35-41
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    • 2019
  • This paper propose design of remotely controllable hologram based interactive signage. General idea is organization of work of hologram signage through using Raspberry Pi hardware platform and Intel realsense r200 for interaction opportunity. Remote content management is based on Screenly software solution. Open CV based solutions are used for content controlling on the spectators side. Represented work describe of using of the 3D content rendering algorithm based on 3D gaming technology Unity 5. An experimental model was carried out with the purpose of IoS designing, to 3D data visualization and to introduce a new method for visualizing and displaying 3D data on a hologram pyramid signage. Description of working model of hologram signage is given in this paper.

Investigation for Fire Flow of the Deeply Underground Shin-Gum-Ho Subway Station (대심도 신금호역사의 화재 유동에 대한 고찰)

  • Jang, Yong-Jun;Park, Il-Soon;Kim, Jin-Ho;Jung, Woo-Sung;Kim, Hag-Beom;Lee, Chang-Hyun
    • Proceedings of the KSR Conference
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    • 2010.06a
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    • pp.110-115
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    • 2010
  • Recently the deeply underground tunnels have been increased along the subway railroads of urban area compared to the past subway railroads. The Shin-Gum-Ho subway station (the Fifth lines, the depth : 46m) which is the third among the deep subway stations in the Korea was chosen as the model of deeply underground stations, and attempted to do simulation of fire. This station consists of three entrance, the basement first floor (B1), the basement second floor (B2), the basement eighth floor or platform (B8) and escalators and stairs from B2 to B8. The total number of grid was about 9,000,000 to make simulation of fire and smoke from the platform to entrance in this research, and the grid system was divided into 19 blocks to increase the efficiency of this simulation. The FDS (Fire Dynamics Simulation) was chosen to make the simulation of fire, and the model of turbulent flow was LES (Large Eddy Simulation). Each block is processed in a CPU using parallel processing of MPI (Message Passing Interface). The resource of CPU for this simulation is a ten of Intel 3.0 GHz Dual CPU (20 CPU).

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