• Journal of Power Electronics
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• 제19권5호
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• pp.1142-1152
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• 2019

This paper presents a control method for reducing the current distortion in an indirect matrix converter (IMC) operating in boost mode under unbalanced input conditions. IMCs operating in boost mode are useful in distributed generation (DG) systems. They are connected with renewable energy systems (RESs) and the grid to transmit the power generated by the RES. However, under unbalanced voltage conditions of the RES, which is connected with the input stage of the IMC operating in boost mode, the input-output currents are distorted. In particular, the output current distortions cause a ripple of the power, which is transferred to the grid. This aggravates the reliability and stability of the DG system. Therefore, in this paper, a control method using positive/negative sequence voltages and currents is proposed for reducing the current distortion of both side in IMCs operating in boost mode. Simulation and experimental results have been presented to validate effectiveness of the proposed control method.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.1999-2001
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• 1997

The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

• 대한전자공학회논문지SD
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• 제40권11호
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• pp.37-44
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• 2003

다수의 입력을 필요로 하는 전류모드 Max 회로에서 고주파 왜곡을 효과적으로 억제할 수 있는 trans conductance 조정 방법을 제안하였다. Max 회로에 인가되는 입력 신호의 개수가 증가하면, 기생 커패시턴스는 입력 단의 개수에 비례하여 누적되게 된다. 본 연구에서는 Max 회로의 왜곡 신호의 크기가 누적된 기생 커패시턴스와 출력신호의 변화율에 비례하며, 공통 다이오드결선 트랜지스터의 transconductance 값에 반비례하게 됨을 밝혔다. 왜곡 억제를 위한 효과적인 방안으로 공통 다이오드결선 트랜지스터의 transconductance 값을 최소화하는 방안을 제시하였다. 이 방법의 효용성은 다양한 수의 입력 신호를 갖는 전류모드 Max 회로에 대해서 HSPICE 시뮬레이션을 통해 입증하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1053-1056
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• 2003

A distortion suppression technology for employing multiple inputs in 3n+1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of inputs in current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to sum of parasitic capacitance in input terminals, to the derivative of the output signal and also to the inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation.

• Journal of Power Electronics
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• 제15권1호
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• pp.10-17
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• 2015

A quasi-constant on-time controlled buck front end in combined discontinuous conduction mode and boundary conduction mode is proposed to improve power factor (PF).When instantaneous AC input voltage is lower than the output bus voltage per period, the buck converter turns into buck-boost converter with the addition of a level comparator to compare input voltage and output voltage. The gate drive voltage is provided by an additional oscillator during distortion time to eliminate the cross-over distortion of the input current. This high PF comes from the avoidance of the input current distortion, thereby enabling energy to be delivered constantly. This paper presents a series analysis of controlling techniques and efficiency, PF, and total harmonic distortion. A comparison in terms of efficiency and PF between the proposed converter and a previous work is performed. The specifications of the converter include the following: input AC voltage is from 90V to 264V, output DC voltage is 80V, and output power is 94W.This converter can achieve PF of 98.74% and efficiency of 97.21% in 220V AC input voltage process.

• 한국통신학회논문지
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• 제21권5호
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• pp.1325-1331
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• 1996

본 논문에서는 전류 스위칭(switched-current:SI) 시스템에서 THD(total harmonic distortion) 증가 원인인 클럭피드스루(clock feedthrough:CFT) 오차 전압을 감소시키는 새로운 전류 메모리(current-memory) 회로를 제안하였다. 제안한 전류 메모리는 CMOS 상보형의 PMOS 트랜지스터를 이용하여 CFT 오차 전압에 의한 출력 왜곡 전류를 감소시킨다. 제안한 전류 메모리 회로를 $1.2{\mu}{\textrm{m}}$ CMOS 공정을 사용하여 설계하고, 입력으로 전류 크기 $68{\mu}{\textrm{m}}$인 1MHz 정현파 신호를 인가하였다.(샘플링 주파수:20MHz) 모의 실험 결과, 기존의 전류 메모리보다 CFT 오차 전압에 의한 출력 왜곡 전류가 10배 정도 감소를 나타내었으며 신호 대 바이어스 전류비가 0.5(peak signal-to-bias current ratio:i/J)인 1KHz 신호를 인가할 경우 THD는 -57dB이다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.556-560
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• 2001

In this paper, a soft-switching discontinuous mode (DCM) power factor corrected (PFC) converter is analyzed by applying the double Fourier series expansion. It is found that the fundamental component and higher-order harmonics included in the input current waveform are obtained by the Fourier series expansion of the mean value of the inductor current. From the theoretical analysis, a new method removing the distortion of the input current waveform is proposed. In spite of an open loop system, the proposed method makes a great improvement of the total harmonic distortion even if the ratio of output voltage to input voltage is very low.

• 한국태양에너지학회 논문집
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• 제32권spc3호
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• pp.228-234
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• 2012

This paper presents the algorithm of the compensation of the grid current distortion caused by the grid voltage unbalance and distortion in 3-phase bi-directional DC to AC inverter. Usually 3-phase grid system has unbalance and distortion because of connecting 1-phase and non-linear load with 3-phase load using same input node. Controlling 3-phase inverter by general method under the unbalanced and distorted grid voltage, the grid current has distortion. This distortion of the grid current cause the grid voltage distortion again. So, it need to control the grid current balanced and non-distorted, even the grid voltage gets unbalanced and distorted. There are some complex method to compensate the gird current distortion. it sugest simple method to solve the problem. PSIM simulation is used to validate the proposed algorithm.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 학술대회 논문집 전문대학교육위원
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• pp.74-78
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• 2000

In this paper a switching control circuit for shaping the line current and reducing the total harmonics distortion in the boost converter is presented. To solve the problems of performance degradation due to pulse waveform in the input current, the boost converter in which the harmonic distortion in the input current is reduced using a 3th harmonic-injected PWM is proposed. Finally, Simulation and experimental results of boost converter with 5[kHz] switching frequency are presented and correction of power factor and reduction of total harmonic distortion was established.

• Journal of Power Electronics
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• 제15권5호
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• pp.1168-1177
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• 2015

This paper presents a scheme to improve the line current distortion of power factor corrector (PFC) topology at the zero crossing point using a predictive control algorithm in both the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The line current in single-phase PFC topology is distorted at the zero crossing point of the input AC voltage because of the characteristic of the general proportional integral (PI) current controller. This distortion degrades the line current quality, such as the total harmonic distortion (THD) and the power factor (PF). Given the optimal duty cycle calculated by estimating the next state current in both the CCM and DCM, the proposed predictive control algorithm has a fast dynamic response and accuracy unlike the conventional PI current control method. These advantages of the proposed algorithm lower the line current distortion of PFC topology. The proposed method is verified through PSIM simulations and experimental results with 1.5 kW bridgeless PFC (BLPFC) topology.