• Journal of KIISE:Computer Systems and Theory
• /
• v.31 no.12
• /
• pp.726-734
• /
• 2004

This paper presents a facial animation method that enables the user to select a sequence of facial frames from the facial expression space, whose level of details the user can select hierarchically Our system creates the facial expression space from about 2400 captured facial frames. To represent the state of each expression, we use the distance matrix that represents the distance between pairs of feature points on the face. The shortest trajectories are found by dynamic programming. The space of facial expressions is multidimensional. To navigate this space, we visualize the space of expressions in 2D space by using the multidimensional scaling(MDS). But because there are too many facial expressions to select from, the user faces difficulty in navigating the space. So, we visualize the space hierarchically. To partition the space into a hierarchy of subspaces, we use fuzzy clustering. In the beginning, the system creates about 10 clusters from the space of 2400 facial expressions. Every tine the level increases, the system doubles the number of clusters. The cluster centers are displayed on 2D screen and are used as candidate key frames for key frame animation. The user selects new key frames along the navigation path of the previous level. At the maximum level, the user completes key frame specification. We let animators use the system to create example animations, and evaluate the system based on the results.

• Journal of KIISE:Computer Systems and Theory
• /
• v.31 no.11
• /
• pp.626-634
• /
• 2004

In a client-server model, network server systems suffer from both heavy communication and computational loads. While communication channels become increasingly speedy, the existing protocol stack architectures still include mainly three performance bottlenecks of protocol stack processing, system call, and network interrupt overheads. To address these obstacles, in this paper we present a host-independent network system where a network interface card (NIC) is utilized in an efficient manner. First, by offloading network-related portion to the NIC, the host can fully utilize its processing power for other useful purposes. Second, it eliminates the system call overhead, such as context-switching and memory copy operations, since the host communicates with the NIC through its user-level libraries. Third, it a] so reduces the network interrupt operation count as the host handles the interrupt in a segment instead of a packet. The experimental results show that the proposed network system reduces the host CPU overhead for communication system by 68-71%. It also shows that the proposed system improves the communication speed by 11-83% under heavy computational and communication load conditions.

• Journal of KIISE:Software and Applications
• /
• v.34 no.7
• /
• pp.655-666
• /
• 2007

Reasoners using typical Tableaux algorithm such as RacerPro, Pellet have a problem in Tableaux algorithm large ABox reasoning. Researches to solve these Problems are dealt with Instance Store of University of Manchester which uses Tableaux algorithm based reasoner and DBMS and KAON2 of University of Karlsruhe using Disjunctive Datalog approach. An evaluation experiment for present reasoners is the experiment of TBox reasoning in most of Tableaux algorithm based one. The most of benchmarking tests in reasoning systems haven't done with ABox reasoning based Tableaux Algorithm but done with TBox reasoning based Tableaux Algorithm. Especially, rarely reported benchmarking tests in reasoners have been issued nowadays. Therefore, this thesis evaluates systems with theory of each reasoners for large ABox reasoning that becomes issues recently with typical reasoners. The large AoBx reasoning engine will be analyzed using Instance Store and KAON2 of Manchester University for large ABox processing. At the analysing method, LUBM(Lehigh University BenchMark), benchmarking test method, and it's test system will be introduced. In conclusion, I recommend appropriate reasoner in various environment with experiment result and characteristic of algorithm used for each reasoner.

• Journal of KIISE:Computer Systems and Theory
• /
• v.32 no.4
• /
• pp.160-167
• /
• 2005

Among finite filed arithmetic operations, division/inverse is known as a basic operation for public-key cryptosystems over $GF(2^{m})$ and it is computed by performing the repetitive $AB^{2}$ multiplication. This paper presents a digit-serial-in-serial-out systolic architecture for performing the $AB^2$ operation in GF$(2^{m})$. To obtain L×L digit-serial-in-serial-out architecture, new $AB^{2}$ algorithm is proposed and partitioning, index transformation and merging the cell of the architecture, which is derived from the algorithm, are proposed. Based on the area-time product, when the digit-size of digit-serial architecture, L, is selected to be less than about m, the proposed digit-serial architecture is efficient than bit-parallel architecture, and L is selected to be less than about $(1/5)log_{2}(m+1)$, the proposed is efficient than bit-serial. In addition, the area-time product complexity of pipelined digit-serial $AB^{2}$ systolic architecture is approximately $10.9\%$ lower than that of nonpipelined one, when it is assumed that m=160 and L=8. Additionally, since the proposed architecture can be utilized for the basic architecture of crypto-processor and it is well suited to VLSI implementation because of its simplicity, regularity and pipelinability.

• Journal of KIISE:Computer Systems and Theory
• /
• v.26 no.10
• /
• pp.1264-1274
• /
• 1999

본 논문에서는 분산된 클록들을 주기적으로 동기화 시키는 분산 실시간 시스템에서 시간적 제약을 만족시키기 위한 정적/동적 시간 제약(timing constraint) 변환 기법을 제안한다. 전형적인 이산클록동기화(discrete clock synchronization) 알고리즘은 클록의 값을 순간적으로 조정하여 클록의 시간이 불연속적으로 진행한다. 이러한 시간상의 불연속성은 시간적 이벤트를 잃어버리거나 다시 발생시키는 오류를 범하게 한다.클록 시간의 불연속성을 피하기 위해 일반적으로 연속클록동기화(continuous clock synchronization) 기법이 제안되고 있지만 소프트웨어적으로 구현되면 많은 오버헤드를 유발시키는 문제점이 있다. 본 논문에서는 시간적 제약을 동적으로 변환시키는 DCT (Dynamic Constraint Transformation) 기법을 제안하였으며, 이를 통해 기존의 이산클록동기화 알고리즘을 수정하지 않고서도 클록 시간의 불연속성에 의한 문제점들을 해결할 수 있도록 하였다. 아울러 DCT에 의해 이산클록동기화 하에서 생성된 태스크 스케쥴이 연속클록동기화에 의해 생성된 스케쥴과 동일함을 증명하여 DCT의 동작이 이론적으로 정확함을 증명하였다.또한 분산 실시간 시스템에서 지역 클록(local clock)이 기준 클록과 완벽하게 일치하지 않아서 발생하는 스케쥴링상의 문제점을 다루었다. 이를 위해 먼저 두 가지의 스케쥴링 가능성, 지역적 스케쥴링 가능성(local schedulability)과 전역적 스케쥴링 가능성(global schedulability)을 정의하고, 이를 위해 시간적 제약을 정적으로 변환시키는 SCT (Static Constraint Transformation) 기법을 제안하였다. SCT를 통해 지역적으로 스케쥴링 가능한 태스크는 전역적으로 스케쥴링이 가능하므로, 단지 지역적 스케쥴링 가능성만을 검사하면 스케쥴링 문제를 해결할 수 있도록 하였고 이를 수학적으로 증명하였다.Abstract In this paper, we present static and dynamic constraint transformation techniques for ensuring timing requirements in a distributed real-time system possessing periodically synchronized distributed local clocks. Traditional discrete clock synchronization algorithms that adjust local clocks instantaneously yield time discontinuities. Such time discontinuities lead to the loss or the gain of events, thus raising serious run-time faults.While continuous clock synchronization is generally suggested to avoid the time discontinuity problem, it incurs too much run-time overhead to be implemented in software. We propose a dynamic constraint transformation (DCT) technique which can solve the problem without modifying discrete clock synchronization algorithms. We formally prove the correctness of the DCT by showing that the DCT with discrete clock synchronization generates the same task schedule as the continuous clock synchronization.We also investigate schedulability problems that arise when imperfect local clocks are used in distributed real-time systems. We first define two notions of schedulability, global schedulability and local schedulability, and then present a static constraint transformation (SCT) technique. The SCT ensures that it is sufficient to check the schedulability of a task locally in a node with a local clock, since the global schedulability of the task is derived from its local schedulability through SCT. We formally prove the correctness of SCT.

• Journal of KIISE:Computer Systems and Theory
• /
• v.30 no.5_6
• /
• pp.232-238
• /
• 2003

Traditional operating systems use a virtual memory to provide users with a bigger memory than a physical memory. The virtual memory augments the insufficient physical memory by the swap device. Since disks are usually used as the swap device, the cost of a page fault is relatively high compared to the access cost of the physical memory. Recently, numerous papers have investigated the Network RAM in order to exploit the idle memory in the network instead of disks. Since today's distributed systems are interconnected with high-performance networks, the network latency is far smaller than the disk access latency In this paper we design and implement the Network RAM using block device driver on Linux. This is the first implementation of the Network RAM on Linux. We propose the new reliability method to recover the page when the other workstation's memory is damaged. The system using the Network RAM as the swap device reduces the execution time by 40.3% than the system using the disk as the swap device. The performance results suggest that the new reliability method that use the processor more efficiently has the similar execution time with others, but uses smaller server memory and generates less message traffic than others.

• Journal of KIISE:Computer Systems and Theory
• /
• v.30 no.5_6
• /
• pp.299-306
• /
• 2003

This paper formulates a problem of embedded real-time system re-engineering, and presents its solution approach. Embedded system re-engineering is defined as a development task of meeting performance requirements newly imposed on a system after its hardware and software have been fully implemented. The performance requirements nay include a real-time throughput and an input-to-output latency. The proposed solution approach is based on a bottleneck analysis and nonlinear optimization. The inputs to the approach include a system design specified with a process network and a set of task graphs, task allocation and scheduling, and a new real-time throughput requirement specified as a system's period constraint. The solution approach works in two steps. In the first step, it determines bottleneck precesses in the process network via estimation of process latencies. In the second step, it derives a system of constraints with performance scaling factors of processing elements being variables. It then solves the constraints for the performance staling factors with an objective of minimizing the total hardware cost of the resultant system. These scaling factors suggest the minimal cost hardware upgrade to meet the new performance requirement. Since this approach does not modify carefully designed software structures, it helps reduce the re-engineering cycle.

• Journal of KIISE:Computer Systems and Theory
• /
• v.30 no.7_8
• /
• pp.408-416
• /
• 2003

An electronic cash system has to provide the security, to prevent the double spending and to support the divisibility of electronic cash for the easy of use. Divisible electronic cash system allows an electronic cash to be divided into subdivisions. Each subdivision is worth any desired value, but all values must add up to the original cash value. Divisible scheme brings some advantages. It reduces to make the change and also there is no necessity that a customer must withdraw a cash of the desired value whenever transactions occur. In this paper, we present an electronic cash protocol which provides the divisibility based on the double hash chain technique. Electronic cash is constructed in the form of coins. Coins, generated by the double hush chain, have different denominations. The divisibility based on the double hash chain technique. Electronic cash is constructed in the form of coins. Coins, generated by the double hash chain, have different denominations. The divisibility of an electronic cash is satisfied by the payment certificate, which is a pair of bank´s proxy signature received from the bank. When a customer pays the coin of subdivision, the fairness of that coin is certified by a customer´s signing instead of a bank. Although the proposed method does not guarantee user´s anonymity, it generates coins which cannot be forged, and the customer can use an electronic cash conveniently and efficiently with its divisibility.

• Informatization Policy
• /
• v.24 no.3
• /
• pp.67-90
• /
• 2017

This study is conducted to find out problems in the implementation system of regional informatization policies in Korea and solutions to enhance the effectiveness in policy execution. The study uses research methodologies such as participant observation, interview and AHP for experts and employees of public organizations for regional informatization policies. Many implications were found in the analysis, including that policy relations, structure of the policy implementation system, and environment and contents of regional informatization policiesin Korea have to be innovated and re-organized. Especially, this paper emphasizes the horizontal and cooperative relationship between the central and local governments and redesigning of the legal system on the regional informatization. This paper also shows expectations on reshaping of the regional informatization policies with the paradigm shift of the government power toward decentralization. This paper also finds diverse views on the problems and solutions for the regional informatization policy implementation system based on different characteristics and interests of policy participants. This paper finds the possibility of applying the policy network model to regional informatization policy implementation, which can be supported by Rhodes & Marsh(1992)'s theory. Therefore, this paper shows the change of regional informatization policies can be expected through application of the policy network. Although the paper draws many academic and policy implications, they are limited to the implementation system of regional informatization policies only.

• The Journal of Engineering Research
• /
• v.1 no.1
• /
• pp.5-14
• /
• 1997

The purpose of thesis is to analyze the radiation characteristics of an offset gregorian antenna in order to design the satellite-loaded antenna. In order to compute the radiation pattern of the sub-reflector, the reflected wave is obtained by GO(Geometric Optics) at an arbitrary shaped sub-reflector. Then the total radiation EM wave is obtained by summing the diffracted fields obtained by UTD(Uniform Geometrical Theory of Diffraction) and the GO fields. In order to calculate the far field radiation pattern of the main reflector, the radiation integral equation is derived from the induced current density on reflector surface using PO(Physical Optics). The kernel is expanded in terms of Jacobi-Bessel series for increasing the computational efficiency, then the modified radiation integral is represented as the double integral equation independent of observation points. When the incident fields are assumed to be x-or y-polarized field, the characteristics of radiation patterns in the gregorian antenna is analyzed in case of the main reflector having the focal length of 62.4$\lambda$, diameter of 100$\lambda$, and offset height of 75$\lambda$, and the sub-reflector having the eccentricity of 0.501, the inter focal length og 32.8$\lambda$, the horn axis angle of $9^{\circ}$ and the half aperture angle of $15.89^{\circ}$. The cross-polarized level and side lobe level in the offset geogorian reflector are reduced by 30dB and 10dB, respectively, in comparison with those of the offset parabolic antenna.