• Title/Summary/Keyword: inductor peaking

Search Result 17, Processing Time 0.027 seconds

Optical Receiver Design For Optical Communication Using Cascoded Amplifier with Inductor Peaking Technique (케스코드 증폭기와 인덕터 피킹기술을 이용한 광통신용 광 수신기의 설계)

  • 박정식;이강승;정윤하
    • Proceedings of the IEEK Conference
    • /
    • 1999.06a
    • /
    • pp.305-308
    • /
    • 1999
  • In this paper, a transimpedance optical receiver based on PIN/P-HEMT with cascoded input stage and inductor peaking technique was designed for several giga bits optical communication. Analysis of the receiver shows that cascoded input stage with inductor peaking increase bandwidth without sacrificing low frequence gain. The receiver achieved a low noise characteristic and maximally flat frequence response. It is shown that the 3-dB bandwidth of the designed receiver is 8.3 ㎓ and input equivalent noise current is as low as 16pA/√Hz to 10㎓.

  • PDF

A 2.5Gb/s 2:1 Multiplexer Design Using Inductive Peaking in $0.18{\mu}m$ CMOS Technology (Micro spiral inductor를 이용한 2.5Gb/s급 2:1 Multiplexer 설계)

  • Kim, Sun-Jung;Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.8
    • /
    • pp.22-29
    • /
    • 2007
  • A 2.5Gb/s 2:1 multiplexer(MUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. Inductive peaking technology was used to improve the performance. On-chip micro spiral inductor was designed to maximize the inductive peaking effect without increasing the chip area much. The designed 4.7 nH micro-spiral inductor was $20\times20{\mu}m2$ in size. 2:1 MUX with and without micro spiral inductors were compared. The rise and fall time was improved more than 23% and 3% respectively using the micro spiral inductors for 1.25Gb/s signal. For 2.5 Gb/s signal, fall and rise time was improved 5.3% and 3.5% respectively. It consumed 61mW and voltage output swing was 1$180mV_{p-p}$ at 2.5Gb/s.

Design and Fabrication of 0.25 μm CMOS TIA Using Active Inductor Shunt Peaking (능동형 인덕터 Shuut Peaking을 이용한 0.25 μm CMOS TIA 설계 및 제작)

  • Cho In-Ho;Lim Yeongseog
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.16 no.9 s.100
    • /
    • pp.957-963
    • /
    • 2005
  • This paper presents technique of wideband TIA for optical communication systems using TSMC 0.25 ${\mu}m$ CMOS RF-Mixed mode. In order to improve bandwidth characteristics of an TIA, we use active inductor shunt peaking to cascode and common-source configuration. The result shows the 37 mW and 45 mW power dissipation with 2.5 V bias and 61 dB$\Omega$ and 61.4 dB$\Omega$ transimpedance gain. And the -3 dB bandwidth of the TIA is enhanced from 0.8 GHz to 1.45 GHz in cascode and 0.61 GHz to 0.9 GHz in common-source. And the input noise current density is $5 pA/\sqrt{Hz}$ and $4.5 pA/\sqrt{Hz}$, and -10 dB out put return loss is obtained in 1.45 GHz. The total size of the chip is $1150{\times}940{\mu}m^2$.

A 6Gbps 1:2 Demultlplexer Design Using Micro Stacked Spiral inductor in CMOS Technology (Micro Stacked Spiral Inductor를 이용한 6Gbps 1:2 Demultiplexer 설계)

  • Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.45 no.5
    • /
    • pp.58-64
    • /
    • 2008
  • A 6Gbps 1:2 demultiplexer(DEMUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. For high speed performance current mode logic(CML) flipflop was used and inductive peaking technology was used so as to obtain higher speed than conventional Current mode logic flipflop. On-chip spiral inductor was designed to maximize the inductive peaking effect using stack structure. Total twelve inductors of $100{\mu}m^2$ area increase was used. The measurement was processed on wafer and 1:2 demultiplexer with and without micro stacked spiral inductors were compared. For 6Gbps data rate measurement, eye width was improved 7.27% and Jitter was improved 43% respectively. Power consumption was 76.8mW and eye height was 180mV at 6 Gbps

SIP based Tunable BPF for UHF TV Tuner Applications (UHF대역 TV 튜너에 적용을 위한 가변형 대역통과필터)

  • Lee, Tae-C.;Park, Jae-Y.
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.57 no.11
    • /
    • pp.2127-2130
    • /
    • 2008
  • In this paper, a tunable bandpass filter with mutual inductive coupling circuits is newly designed and demonstrated for UHF TV tuner ranged from Ch.14(473MHz) to Ch.69(803MHz) applications. Conventional HF tuning circuit with an electromagnetic bandpass filter has several problems such as large size, high volume and high cost, since the electromagnetic filter is comprised of several passive components and air core inductors to be assembled and controlled manually. To address these obstacles, peaking chip inductor was newly applied for constructing the mutual inductive coupling circuit. The proposed circuit was newly and optimally designed, since the chip inductor showed lower components Q-value than the air core inductor. A varactor diode has been also used to fabricate the proposed tunable bandpass filter for RF tuning circuit. The fabricated tunable filter exhibited low insertion loss of approximately -3dB, high return loss of below -10dB, and large tuning bandwidth of 330MHz.

Study on the Ultra-Wideband Microwave Amplifier Design for MMIC (MMIC용 초광대역 마이크로파 증폭기설계에 관한 연구)

  • 이영철;신철재
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.3 no.1
    • /
    • pp.11-19
    • /
    • 1992
  • To design of Ultra-wideband amplifier, we analyzed the inductor peaking to reduce the capacitance effect of GaAs MESFET in upper frequency edge. And we deduced an optimun inductor peaking element from transfer function of GaAs MESFET small-signal equivalent circut and realized the Feedback Amplifier Module (FAM) having flat gain. We design the imput and output impe dance matching networks by Real-Frequency Method. It show that the gain of designed amplifier has a 6.38dB with gain variation 0.56 at 0.1~12 GHz frequency gand by computer simu-lation.

  • PDF

Design of UWB CMOS Low Noise Amplifier Using Inductor Peaking Technique (인덕터 피킹기법을 이용한 초광대역 CMOS 저잡음 증폭기 설계)

  • Sung, Young-Kyu;Yoon, Kyung-Sik
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.1
    • /
    • pp.158-165
    • /
    • 2013
  • In this paper, a new circuit topology of an ultra-wideband (UWB) 3.1-10.6GHz CMOS low noise amplifier is presented. The proposed UWB low noise amplifier is designed utilizing RC feedback and LC filter networks which can provide good input impedance matching. In this design, the current-reused topology is adopted to reduce the power consumption and the inductor-peaking technique is applied for the purpose of bandwidth extension. The performance results of this UWB low noise amplifier simulated in $0.18-{\mu}m$ CMOS process technology exhibit a power gain of 14-14.9dB, an input matching of better than -10.8dB, gain flatness of 0.9dB, and a noise figure of 2.7-3.3dB in the frequency range of 3.1-10.6GHz. In addition, the input IP3 is -5dBm and the power consumption is 12.5mW.

An Wideband GaN Low Noise Amplifier in a 3×3 mm2 Quad Flat Non-leaded Package

  • Park, Hyun-Woo;Ham, Sun-Jun;Lai, Ngoc-Duy-Hien;Kim, Nam-Yoon;Kim, Chang-Woo;Yoon, Sang-Woong
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.15 no.2
    • /
    • pp.301-306
    • /
    • 2015
  • An ultra-compact and wideband low noise amplifier (LNA) in a quad flat non-leaded (QFN) package is presented. The LNA monolithic microwave integrated circuit (MMIC) is implemented in a $0.25{\mu}m$ GaN IC technology on a Silicon Carbide (SiC) substrate provided by Triquint. A source degeneration inductor and a gate inductor are used to obtain the noise and input matching simultaneously. The resistive feedback and inductor peaking techniques are employed to achieve a wideband characteristic. The LNA chip is mounted in the $3{\times}3-mm^2$ QFN package and measured. The supply voltages for the first and second stages are 14 V and 7 V, respectively, and the total current is 70 mA. The highest gain is 13.5 dB around the mid-band, and -3 dB frequencies are observed at 0.7 and 12 GHz. Input and output return losses ($S_{11}$ and $S_{22}$) of less than -10 dB measure from 1 to 12 GHz; there is an absolute bandwidth of 11 GHz and a fractional bandwidth of 169%. Across the bandwidth, the noise figures (NFs) are between 3 and 5 dB, while the output-referred third-order intercept points (OIP3s) are between 26 and 28 dBm. The overall chip size with all bonding pads is $1.1{\times}0.9mm^2$. To the best of our knowledge, this LNA shows the best figure-of-merit (FoM) compared with other published GaN LNAs with the same gate length.

Analysis of the Microwave Amplifier Ultra-wideband Characteristics with Feedback Amplifier Module (궤환증폭모듈을 이용한 마이크로파 증폭기의 초광대역특성 분석)

  • 김영진;이영철
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.19 no.11
    • /
    • pp.2238-2248
    • /
    • 1994
  • In this paper, we analyze a Microwave Amplifier Ultra-Wideband charateristic to apply Multi-Giga b/s optical receiver preamplifier in high speed optical communication system. To obtain frequency expanding effect. we analyze the frequency gain degradation effects of capacitances in the GaAs MESFET small-signal equivalent circuit and design Feedback amplifier Module(FAM) which has inductor peaking elements to compensate its effects and to expand frequency band. We derive optimum inductor peaking values in order to get flat gain in frequency band. The input and the output impedances of FAM are matched by Real Frequency Method and we design one and two stage ultra wideband microwave amplifier. With simulation results, it show $6.36\sim6.86dB$ and $9.1\sim10.3dB$ gains and execllent gain flatness in $0.5\sim12GHz$ respectively.

  • PDF

A 6 Gb/s Low Power Transimpedance Amplifier with Inductor Peaking and Gain Control for 4-channel Passive Optical Network in 0.13 μm CMOS

  • Lee, Juri;Park, Hyung Gu;Kim, In Seong;Pu, YoungGun;Hwang, Keum Cheol;Yang, Youngoo;Lee, Kang-Yoon;Seo, Munkyo
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.15 no.1
    • /
    • pp.122-130
    • /
    • 2015
  • This paper presents a 6 Gb/s 4-channel arrayed transimpedance amplifiers (TIA) with the gain control for 4-channel passive optical network in $0.13{\mu}m$ complementary metal oxide semiconductor (CMOS) technology. A regulated cascode input stage and inductive-series peaking are proposed in order to increase the bandwidth. Also, a variable gain control is implemented to provide flexibility to the overall system. The TIA has a maximum $98.1dB{\Omega}$ gain and an input current noise level of about 37.8 pA/Hz. The die area of the fabricated TIA is $1.9mm{\times}2.2mm$ for 4-channel. The power dissipation is 47.64 mW/1ch.