• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.223-224
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• 2011

This paper presents the method to design the inductor and capacitor value considering the ripple component that may be generated by three operating states of the Quasi Z source inverter at the impedance network. Based on the analysis of each operation mode, the equations of the capacitor voltage and inductor current are derived. In order to simplify the design processing, design equations of the impedance network are derived where the capacitor voltage and inductor current are lineared. The validity of the design method is verified with the simulation result using PSIM.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.203-204
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• 2012

This paper presents the method to design the inductor and capacitor value considering the ripple component that may be generated by three operating states of the Quasi Z-source inverter at the impedance network. Based on the analysis of each operation mode, the equations of the capacitor voltage and inductor current are derived. In order to simplify the design processing, design equations of the impedance network are derived where the capacitor voltage and inductor current are lineared. The validity of the design method is verified with the simulation result using PSIM and experimental result using 32-bit DSP.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.9
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• pp.1693-1698
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• 2015

This paper proposed a PFM(pulse-frequency modulator) boost converter which has dual pulse-width. The PFM boost converter is composed of BGR(band gap voltage reference generating circuit), voltage reference generating circuit, soft-start circuit, error amplifier, high-speed comparator, inductor current sensing circuit and pulse-width generator. Converter has different inductor peak current so it has wider load current range and smaller output voltage ripple. Proposed PFM boost converter generates 18V output voltage with input voltage of 3.7V and it has load current range of 0.1~300mA. Simulation results show 0.43% output voltage ripple at ligh load mode and 0.79% output voltage ripple at heavy load mode. Converter has efficiency 85% at light lode mode and it has maximum 86.4% at 20mA load current.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.6
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• pp.538-541
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• 2016

This paper proposes an LCL-filter design for space vector pulse width modulation (SVM) in grid-connected three-phase inverter systems. Although there are a several studies in progress, the existing methods are erroneous because they do not focus on the other switching methods. This paper presents the design methodology for an LCL-filter that is optimized for SVM switching operations. The design procedure for the LCL-filter is presented step-by-step. The inverter-side inductor was determined by an analysis of the ripple components, mathematically. Based on the reactive power absorption ratio, the filter capacitor was determined. The grid-side inductor was determined by the ripple attenuation factor of the output current. Experimental results verify the validity of the design method for the LCL-filter.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1035-1046
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• 2015

This study presents a practical implementation of a multi-mode two-phase interleaved boost converter for fuel cell electric vehicle application. The main operating modes, which include two continuous conducting modes and four discontinuous conducting modes, are discussed. The boundaries and transitions among these modes are analyzed with consideration of the inductor parasitic resistance. The safe operational area is analyzed through a comparison of the different operating modes. The output voltage and power characteristics with open-loop or closed-loop operation are also discussed. Key performance parameters, including the DC voltage gain, input ripple current, output ripple voltage, and switch stresses, are presented and supported by simulation and experimental results.

• Journal of Power Electronics
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• v.17 no.3
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• pp.590-600
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• 2017

This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.1
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• pp.116-123
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• 2003

In this paper, interleaved boost converter is applied as a pre-regulator in switched mode power supply. The pre-regulator plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.2
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• pp.95-101
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• 2016

This paper proposed a high-power density bidirectional converter for hybrid electric vehicle high-voltage DC-DC converter(HDC). The conventional HDC has two disadvantages. First, large inductance is required to satisfy the ripple current of inductor by low switching frequency (<20 kHz). Second, large core size is required to prevent the saturation of inductor by high current. Compared with the conventional HDC, the proposed HDC can reduce inductance with SiC-FET for high frequency driving. High-power density of I/O capacitors can be achieved through two-phase interleaved method. The high-power density of inductors can be achieved because the offset current of magnetizing inductance is theoretically terminated by using the differential mode coupled inductor instead of using two single inductors. The validity of the proposed converter is proved through the 50 kW prototype.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.10
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• pp.1432-1441
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• 2012

In this study, an improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source inverter(Improved LCCT ZSI) with characteristics of Quasi Z-source inverter(QZSI) and LCCT Z-source inverter(LCCT ZSI) is proposed. The proposed inverter can also reduce the voltage stress and input current/capacitor voltage ripples compared with conventional LCCT ZSI and Quasi ZSI. A two winding trans in Z-impedance network of the conventional LCCT ZSI is replaced by a three winding trans in the proposed inverter. To verify the validity of the proposed inverter, a DSP controlled hardware was made and PSIM simulation was executed for each method. Comparing the current and voltage ripples of each method under the condition of input DC voltage 70[V] and output AC voltage 76[Vrms], the input current and capacitor voltage ripple factors of the proposed inverter were low as 11[%] and 1.4[%] respectively. And, for generation of the same output AC voltage of each method, voltage stress of the proposed inverter was low as 175[V] under the condition of duty ratio D=0.15. As mentioned above, we could know that the proposed inverter have the characteristics of low voltage stress, low ripple factor and low operation duty ratio compared with the conventional methods. Finally, the efficiency according to load change/duty ratio and the transient state characteristics were discussed.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.259-261
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• 1996

In this paper, active input filter for power factor correction(PFC) circuit employing ripple arrent and voltage cancellation is proposed to reduce filter's size and cost, and to make filter design easy. Switching ripple current and voltage can be sensed through the secondary windings of filter inductor. Single stage passive filter can achieve high order filter characteristics by using active ripple current and voltage cancellation technique. Conventional high order passive filter and its problems are suggested. Analysis of active filter and design procedure are detailed. Simulation result is presented to verify high order filter characteristics of proposed scheme.