• Title/Summary/Keyword: in-band communication

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Performance Analysis of Noncoherent OOK UWB Transceiver for LR-WPAN (저속 WPAN용 비동기 OOK 방식 UWB 송수신기 성능 분석)

  • Ki Myoungoh;Choi Sungsoo;Oh Hui-Myoung;Kim Kwan-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.11A
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    • pp.1027-1034
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    • 2005
  • IEEE802.15.4a, which is started to realize the PHY layer including high precision ranging/positioning and low data rate communication functions, requires a simple and low power consumable transceiver architecture. To satisfy this requirements, the simple noncoherent on-off keying (OOK) UWB transceiver with the parallel energy window banks (PEWB) giving high precision signal processing interface is proposed. The flexibility of the proposed system in multipath fading channel environments is acquired with the pulse and bit repetition method. To analyze the bit error rate (BER) performance of this proposed system, a noise model in receiver is derived with commonly used random variable distribution, chi-square. BER of $10^{-5}$ under the line-of-sight (LOS) residential channel is achieved with the integration time of 32 ns and signal to noise ratio (SNR) of 15.3 dB. For the non-line-of-sight (NLOS) outdoor channel, the integration time of 72 ns and SNR of 16.2 dB are needed. The integrated energy to total received energy (IRR) for the best BER performance is about $86\%$.

Design of a Low Power Digital Filter Using Variable Canonic Signed Digit Coefficients (가변 CSD 계수를 이용한 저전력 디지털 필터의 설계)

  • Kim, Yeong-U;Yu, Jae-Taek;Kim, Su-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.7
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    • pp.455-463
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    • 2001
  • In this Paper, an approximate processing method is proposed and tested. The proposed method uses variable CSD (VCSD) coefficients which approximate filter stopband attenuation by controlling the precision of the CSD coefficient sets. A decimation filter for Audio Codec '97 specifications has been designed having processor architecture that consists of program/data memory, arithmetic unit, energy/level decision, and sinc filter blocks, and fabricated with 0.6${\mu}{\textrm}{m}$ CMOS sea-of-gate technology. For the combined two halfband FIR filters in decimation filter, the number of addition operations were reduced to 63.5%, 35.7%, and 13.9%, compared to worst-case which is not an adaptive one. Experimental results show that the total power reduction rate of the filter is varying from 3.8 % to 9.0 % with respect to worst-case. The proposed approximate processing method using variable CSD coefficients is readily applicable to various kinds of filters and suitable, especially, for the speech and audio applications, like oversampling ADCs and DACs, filter banks, voice/audio codecs, etc.

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A Design of Pipelined Adaptive Decision-Feedback Equalized using Delayed LMS and Redundant Binary Complex Filter Structure (Delayed LMS와 Redundant Binary 복소수 필터구조를 이용한 파이프라인 적응 결정귀환 등화기 설계)

  • An, Byung-Gyu;Lee, Jong-Nam;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.12
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    • pp.60-69
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    • 2000
  • This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer(PADFE) using a 0.25-${\mu}m$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of the ADFE by using delayed least-mean-square(DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width, and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The single-chip PADFE contains about 205,000 transistors on an area of about $1.96\times1.35-mm^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW. Test results show that the fabricated chip works functionally well.

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A 200-MHz@2.5V 0.25-$\mu\textrm{m}$ CMOS Pipelined Adaptive Decision-Feedback Equalizer (200-MHz@2.5-V 0.25-$\mu\textrm{m}$ CMOS 파이프라인 적응 결정귀환 등화기)

  • 안병규;이종남;신경욱
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.05a
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    • pp.465-469
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    • 2000
  • This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

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Design and Analysis of 4D-8PSK-TCM System Considering the Nonlinear HPA Environment (비선형 HPA 환경을 고려한 4D-8PSK-TCM 시스템의 설계 및 분석)

  • An, Changyoung;Ryu, Sang-Burm;Lee, Sang-Gyu;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.4
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    • pp.299-307
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    • 2018
  • Considering a nonlinear high power amplifier(HPA) and a predistorter, we have designed a four-dimensional 8-ary phase shift keying trellis-coded modulation(4D-8PSK-TCM) system, which is recommended for X-band satellite communications. Subsequently, we have evaluated and analyzed the spectrum, constellation characteristics, and BER performance of the system. In satellite communications, owing to the limited power, nonlinear characteristics that determine the operating point of the HPA must be analyzed because the HPA consumes high power. We herein report the design of the 4D-8PSK-TCM system, with efficiencies of 2 and 2.25 bits/channel-symbol. The simulation results confirmed that a 0.35 roll-off value is effective, considering the low peak-to-average power ratio(PAPR) characteristic and the narrow occupation bandwidth of the spectrum. It also confirmed that approximately 15~20 dB of output backoff(OBO) value is required at the HPA when the predistorter is not used, and approximately 1 dB of the OBO value is required when the predistorter is used.

Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity (개선된 선형성을 가지는 R-2R 기반 5-MS/s 10-비트 디지털-아날로그 변환기)

  • Jeong, Dong-Gil;Park, Sang-Min;Hwang, Yu-Jeong;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.149-155
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    • 2015
  • This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.

A Study on pluralistic Reformation for Education of Telecommunication -for Establishment of Individual System for Comm. Education- (통신교육의 계열화와 계층화 -고유한 교역의 형성을 위하여-)

  • 조정현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.3 no.1
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    • pp.28-30
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    • 1978
  • Communication actions as a social band or Human community stick (fast) to human being ceaselessly w without stopping everywhere. All of comm. actions can be kept up and developed by the education of its own. Comm. actions have to include a character of social process, and so for it the social science should t to be some essential part of it. Therefore, Comm. education have to be schemed for achieving with a point of view of synthetical s science including technical and social factor. However, recentry Comm. education be suffered to lose of itowns essential attribute and individual i independence becausing to reduce social weight recklessly in their education It is a prindiple that Comm. science is an integrate science being composed of human, social and t technical subdepartments and so comm. education have to obey for Comm. constuctional theory, i international and social claim. Originally in Korea a educational idea and genealogy forming by the comm. scientific theory has I inherited on orthodoxy. But in 1961, communication college that is only the orthodox model of Comm. education, was f forced to close by some reckless policy and then the national administration for the Comm. education h have been weakened, and so recently it’s education became to degenerate as out of genealogy or n nonsystem alike some scattering Family. On the other side, today comm. science make to it’s modern scientific factor and to keep its l integrate level, therefore, all of educational provisions and administration for the telecomm. should t to be supplement to be fit for their plural chatacters. Comm. education have to occupy an individual educational system through the comm. theory, and t then it can be coexisted with neighbour scientific field equally and can include, connect coordinate o or effect its inference in each subfactor organically. Finally, educational system for telecommunication should to be requested as preeedence that i independent field including pluralism must be formed and sufficient autonomy be guarenteed, and s so Comm. education must be to restored its orthodox genealogy and be recovered individual system a and seIfrestraint field, and then it can be accomplished its own duty for nation and society.

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Design and Implementation of Clipcast Service via Terrestrial DMB (지상파 DMB를 이용한 클립캐스트 서비스 설계 및 구현)

  • Cho, Suk-Hyun;Seo, Jong-Soo
    • Journal of Broadcast Engineering
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    • v.16 no.1
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    • pp.23-32
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    • 2011
  • Design and Implementation of Clipcast Service via Terrestrial DMB This paper outlines the system design and the implementation process of clipcast service that can send clips of video, mp3, text, images, etc. to terrestrial DMB terminals. To provide clipcast service in terrestrial DMB, a separate data channel needs to be allocated and this requires changes in the existing bandwidth allocation. Clipcast contents can be sent after midnight at around 3 to 4 AM, when terrestrial DMB viewship is low. If the video service bit rate is lowered to 352 Kbps and the TPEG service band is fully used, then 320 Kbps bit rate can be allocated to clipcast. To enable clipcast service, the terminals' DMB program must be executed, and this can be done through SMS and EPG. Clipcast service applies MOT protocol to transmit multimedia objects, and transmits twice in carousel format for stable transmission of files. Therefore, 72Mbyte data can be transmitted in one hour, which corresponds to about 20 minutes of full motion video service at 500Kbps data rate. When running the clip transmitted through terrestrial DMB data channel, information regarding the length of each clip is received through communication with the CMS(Content Management Server), then error-free files are displayed. The clips can be provided to the users as preview contents of the complete VOD contents. In order to use the complete content, the user needs to access the URL allocated for that specific content and download the content by completing a billing process. This paper suggests the design and implementation of terrestrial DMB system to provide clipcast service, which enables file download services as provided in MediaFLO, DVB-H, and the other mobile broadcasting systems. Unlike the other mobile broadcasting systems, the proposed system applies more reliable SMS method to activate the DMB terminals for highly stable clipcast service. This allows hybrid, i.e, both SMS and EPG activations of terminals for clipcast services.

A study on the implementation of Medical Telemetry systems using wireless public data network (무선공중망을 이용한 의료 정보 데이터 원격 모니터링 시스템에 관한 연구)

  • 이택규;김영길
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.10a
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    • pp.278-283
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    • 2000
  • As information communication technology developed we could check our blood pressure, pulsation electrocardiogram, SpO2 and blood test easily at home. To check our health at ordinary times is able though interlocking the house medical instrument with the wireless public data network This service will help the inconvenience to visit the hospital everytime and will save the individual's time and cost. In each house an organism data which is detected from the human body will be transmitted to the distance hospital and will be essentially applied through wireless public data network The medical information transmit system is utilized by wireless close range network It would transmit the obtained organism signal wirelessly from the personal device to the main center system in the hospital. Remote telemetry system is embodied by utilizing wireless media access protocol. The protocol is embodied by grafting CSMA/CA(Carrier Sense Multiple Access with Collision Avoidance) protocol falling mode which is standards from IEEE 802.11. Among the house care telemetry system which could measure blood pressure, pulsation, electrocardiogram, SpO2 the study embodies the ECC(electrocardiograph) measure part. It within the ECC function into the movable device and add 900㎒ band wireless public data interface. Then the aged, the patients even anyone in the house could obtain ECG and keep, record the data. It would be essential to control those who had a health-examination heart diseases or more complicated heart diseases and to observe the latent heart disease patient continuously. To embody the medical information transmit system which is based on wireless network. It would transmit the ECG data among the organism signal data which would be utilized by wireless network modem and NCL(Native Control Language) protocol to contact through wireless network Through the SCR(Standard Context Routing) protocol in the network it will be connected to the wired host computer. The computer will check the recorded individual information and the obtained ECC data then send the correspond examination to the movable device. The study suggests the medical transmit system model utilized by the wireless public data network.

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A 1.1V 12b 100MS/s 0.43㎟ ADC based on a low-voltage gain-boosting amplifier in a 45nm CMOS technology (45nm CMOS 공정기술에 최적화된 저전압용 이득-부스팅 증폭기 기반의 1.1V 12b 100MS/s 0.43㎟ ADC)

  • An, Tai-Ji;Park, Jun-Sang;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.122-130
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    • 2013
  • This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.