1 |
D. Marche, and Y. Savaria, "Modeling R-2R Segmented-Ladder DACs," in IEEE Transactions on Circuits and Systems, vol. 57, no. 1, pp. 31-43, Jan. 2010.
DOI
|
2 |
D. Marche, Y. Savaria, and Y. Gagnon, "A New Switch Compensation Technique for Inverted R-2R Ladder DACs", in IEEE International Symposium on Circuits and Systems, pp. 196-199, May. 2005.
|
3 |
M. P. Kennedy, "On the Robustness of R-2R Ladder DAC's", in IEEE Transactions on Circuits and Systems, vol. 47, no. 2, pp. 109-116, Feb. 2000.
DOI
|
4 |
Lei Wang, Y. Fukatsu, and K. Watanabe, "A CMOS R-2R Ladder Digital-to-Analog Converter and Its Characterization", in Proceeding of the 18th IEEE Instrumentation and Measurement Technology Conference, Hungary, pp. 1026-1031, May. 2001.
|
5 |
H.Y. Lee, Y. J. Hwang, Y. C. Jang, "Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity", in Journal of the Korea Institute of Information and Communication Engineering, vol. 17, no. 10, pp. 2395-2402, Oct. 2013.
과학기술학회마을
DOI
|
6 |
Banba. H, Shiga. H, Umezawa. A, Miyaba. T, Tanzawa .T, Atsumi .S, and Sakui .K, "A CMOS Bandgap Reference Circuit with Sub-1-V Operation", in IEEE Journal of Solid-State Circuits, vol. 34, no. 5, pp. 670-674, May. 1999.
DOI
|
7 |
Marche, D, Savaria, Y, Gagnon, Y, "An Improved Switch Compensation Technique for Inverted R-2R Ladder DACs", IEEE Transactions on Circuits and Systems I, vol. 56, no. 6, pp. 1115-1124, JUN, 2009.
DOI
|
8 |
Pang-Jung Liu, and Chen, Y-J.E, "A 10-bit CMOS DAC With Current Interpolated Gamma Correction for LCD Source Drivers", IEEE Transactions on Circuits and Systems for Video Technology, vol. 22, no. 6, pp. 958-965, JUN, 2012.
DOI
|