Browse > Article
http://dx.doi.org/10.6109/jkiice.2015.19.1.149

Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity  

Jeong, Dong-Gil (Department of Electronic Engineering, Kumoh National Institute of Technology)
Park, Sang-Min (Department of Electronic Engineering, Kumoh National Institute of Technology)
Hwang, Yu-Jeong (Department of Electronic Engineering, Kumoh National Institute of Technology)
Jang, Young-Chan (Department of Electronic Engineering, Kumoh National Institute of Technology)
Abstract
This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.
Keywords
Digital-to-analog converter; R-2R; linearity; operational amplifier; rail-to-rail input range;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 D. Marche, and Y. Savaria, "Modeling R-2R Segmented-Ladder DACs," in IEEE Transactions on Circuits and Systems, vol. 57, no. 1, pp. 31-43, Jan. 2010.   DOI
2 D. Marche, Y. Savaria, and Y. Gagnon, "A New Switch Compensation Technique for Inverted R-2R Ladder DACs", in IEEE International Symposium on Circuits and Systems, pp. 196-199, May. 2005.
3 M. P. Kennedy, "On the Robustness of R-2R Ladder DAC's", in IEEE Transactions on Circuits and Systems, vol. 47, no. 2, pp. 109-116, Feb. 2000.   DOI
4 Lei Wang, Y. Fukatsu, and K. Watanabe, "A CMOS R-2R Ladder Digital-to-Analog Converter and Its Characterization", in Proceeding of the 18th IEEE Instrumentation and Measurement Technology Conference, Hungary, pp. 1026-1031, May. 2001.
5 H.Y. Lee, Y. J. Hwang, Y. C. Jang, "Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity", in Journal of the Korea Institute of Information and Communication Engineering, vol. 17, no. 10, pp. 2395-2402, Oct. 2013.   과학기술학회마을   DOI
6 Banba. H, Shiga. H, Umezawa. A, Miyaba. T, Tanzawa .T, Atsumi .S, and Sakui .K, "A CMOS Bandgap Reference Circuit with Sub-1-V Operation", in IEEE Journal of Solid-State Circuits, vol. 34, no. 5, pp. 670-674, May. 1999.   DOI
7 Marche, D, Savaria, Y, Gagnon, Y, "An Improved Switch Compensation Technique for Inverted R-2R Ladder DACs", IEEE Transactions on Circuits and Systems I, vol. 56, no. 6, pp. 1115-1124, JUN, 2009.   DOI
8 Pang-Jung Liu, and Chen, Y-J.E, "A 10-bit CMOS DAC With Current Interpolated Gamma Correction for LCD Source Drivers", IEEE Transactions on Circuits and Systems for Video Technology, vol. 22, no. 6, pp. 958-965, JUN, 2012.   DOI