• ETRI Journal
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• v.36 no.3
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• pp.510-513
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• 2014

A Q-band pHEMT image-rejection low-noise amplifier (IR-LNA) is presented using inter-stage tunable resonators. The inter-stage L-C resonators can maximize an image rejection by functioning as inter-stage matching circuits at an operating frequency ($F_{OP}$) and short circuits at an image frequency ($F_{IM}$). In addition, it also brings more wideband image rejection than conventional notch filters. Moreover, tunable varactors in L-C resonators not only compensate for the mismatch of an image frequency induced by the process variation or model error but can also change the image frequency according to a required RF frequency. The implemented pHEMT IR-LNA shows 54.3 dB maximum image rejection ratio (IRR). By changing the varactor bias, the image frequency shifts from 27 GHz to 37 GHz with over 40 dB IRR, a 19.1 dB to 17.6 dB peak gain, and 3.2 dB to 4.3 dB noise figure. To the best of the authors' knowledge, it shows the highest IRR and $F_{IM}/F_{OP}$ of the reported millimeter/quasi-millimeter wave IR-LNAs.

• Journal of electromagnetic engineering and science
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• v.6 no.1
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• pp.18-23
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• 2006

In this paper, we demonstrate a fully integrated X-band image rejection down converter, which was developed using InGaP/GaAs HBT MMIC technology, consists of two single-balanced mixers, a differential buffer amplifier, a differential YCO, an LO quadratue generator, a three-stage polyphase filter, and a differential intermediate frequency(IF) amplifier. The X-band image rejection downconverter yields an image rejection ratio of over 25 dB, a conversion gain of over 2.5 dB, and an output-referred 1-dB compression power$(P_{1dB,OUT})$ of - 10 dBm. This downconverter achieves broadband image rejection characteristics over a frequency range of 1.1 GHz with a current consumption of 60 mA from a 3-V supply.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.6
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• pp.272-275
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• 2004

A balanced single side-band (SSB) mixer employing a sub-harmonic configuration is designed for up and down conversions in K-band. The designed mixer uses anti-parallel diode (APD) pairs to effectively eliminate even harmonics of the local oscillator (LO) spurious signal. To reduce the odd harmonics of LO at the RF port, we employ a balanced configuration for LO. The fabricated chip shows 12$\pm$2dB of conversion loss and image-rejection ratio of about 20dB for down conversion at RF frequencies of 24-27.5GHz. As an up-conversion mode, the designed chip shows 12dB of conversion loss and image-rejection ratio of 20 ～ 25 dB at RF frequencies of 25 to 27GHz. The odd harmonics of the LO are measured below -37dBc.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.365-368
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• 2000

This paper describes image-rejection down conversion mixer for bluetooth application using 0.35u CMOS process. the proposed architecture is composed of LO phase shifter, mixer core, IF buffer, and IF phase shifter. IF phase shifter is designed using polyphase fillet. Simulation results show conversion gain = l0㏈, input 1㏈ compression point = -15.7㏈m. input third-order intercept point(IIP3) = -4.4㏈m, and image-rejection ratio = 37.8㏈, respectively, at 3V supply voltage, and 15.7㎃ current.

• ETRI Journal
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• v.36 no.1
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• pp.12-21
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• 2014

In this paper, we propose a new digital blind in-phase/quadrature-phase (I/Q) mismatch compensation technique for image rejection in a direct-conversion receiver (DCR). The proposed image-rejection circuit adopts DC offset cancellation and a sign-sign least mean squares (LMS) algorithm with a unique step size adaptation both for a fast and precise I/Q mismatch estimation. In addition, several performance-optimizing design considerations related to accuracy, speed, and hardware simplicity are discussed. The implementation of the proposed circuit in an FPGA results in an image-rejection ratio (IRR) of 65 dB, which is the best performance with modulated signals, along with an adaptation time of 0.9 seconds, which is a tenfold increase in the compensation speed as compared to previously reported circuits. The proposed technique will be a promising solution in the area of image rejection to increase both the speed and accuracy of future DCRs.

• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.6
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• pp.1058-1063
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• 2010

In this paper, we designed self-frequency synchronizing circuit using image rejection mixer(IRM) and single-sideband(SSB) up-converter which can effectively eliminate the image frequencies occurred in multi-channel super-heterodyne receivers and help us to match inter-channel phase. Also the self-frequency synchronizing circuit simplifies system because there need no extra devices for making intermediate frequency(IF) by creating the local signal within several nanoseconds by means of generating the same frequency of IF signal and modulating radio frequency(RF) signal. We adopt the limiting amplifier for the purpose of protecting the circuit from spurious signals which come from the front end side having wide instantaneous bandwidth characteristics and constantly injecting same level into the input local signal of IRM. The IRM we fabricated has image rejection ratio of 27dB, which is good over 7dB for foreign company's. Also, the SSB up-converter we fabricated has 1dB compression point of 18dBm, which is good over 16dB for foreign company's. And the size is compact about one-forth.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.2
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• pp.35-40
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• 2013

In this paper, we propose a new image rejection receiver architecture using simultaneously the high-side and low-side injected LO signals. The proposed architecture has a lower noise figure (NF) performance and a higher linearity characteristic than the previous receiver architecture using a single LO signal. Also, the proposed receiver shows a higher IRR performance about 6dB than that of the previous Weaver image rejection architecture even though the same gain and phase errors between I-path and Q-path exist. To verify these characteristics, we derive an IRR formular of the proposed architecture as a function of mismatch parameters. And we demonstrate its formular's usefulness through the system simulation. Therefore, the proposed architecture will be widely used to implement the image rejection receiver due to its higher IRR performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.43-48
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• 2012

This paper presents an iterative single-frequency continuous-wave signal-based I/Q regeneration method for improving image-rejection performance of multi-port junction-based direct receivers (MPDRs). This paper analyzes I/Q regeneration in MPDRs as I/Q mismatch compensation for direct conversion receivers. Based on the analysis, this paper evaluates the accuracy of I/Q regeneration in terms of the image-rejection ratio (IRR). The proposed method improves the IRR performance more than 20 dB compared to existing I/Q regeneration methods. Simulation results show that MPDRs using the proposed method can achieve an IRR of more than 70 dB, and that the bit error rate performances are almost the same as those of conventional coherent demodulators, even in fading channels.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.893-896
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• 2005

This paper describes Low Noise Amplifier(LNA) and Single Balanced Mixer(SBM) with monolithic image rejection notch filter using 0.5um MESFET process. LNA, Notch filter, and SBM were integrated on a chip. This chip does not need off chip SAW filter, thereby reducing the overall cost and system volume. The LNA with Notch filter provides a gain of 15dB, noise figure of 1.2dB, and image rejection ratio of -74dB. The SBM has a conversion gain of 6dB.

• Journal of electromagnetic engineering and science
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• v.10 no.1
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• pp.25-27
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• 2010

This paper presents a gain and phase mismatch calibration technique for an image-reject RF receiver. The gain mismatch is calibrated by directly measuring the output signal amplitudes of two signal paths. The phase mismatch is calibrated by measuring the output amplitude of the final IF output at the image band. The calibration of the gain and phase mismatch is performed at power-up, and the normal operation of the RF receiver does not interfere with the mismatch calibration circuit. To verify the proposed technique, a 2.4-GHz Weaver image-reject receiver with the gain and phase mismatch calibration circuit is implemented in a 0.18-${\mu}m$ CMOS technology. The overall receiver achieves a voltage gain of 45 dB and a noise figure of 4.8 dB. The image rejection ratio(IRR) is improved from 31 dB to 59.76 dB even with 1 dB and $5^{\circ}$ mismatch in gain and phase, respectively.