• Journal of Korea Multimedia Society
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• v.9 no.2
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• pp.244-254
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• 2006

This paper presents an efficient hybrid technique to compact the trie indexing the huge forward table small enough to be stored into cache for speeding up IP lookup. It combines two techniques, an encoding scheme called bit-map and a controlled-prefix expanding scheme to replace slow memory search with few fast-memory accesses and computations. For compaction, the bit-map represents each index and child pointer with one bit respectively. For example, when one node denotes n bits, the bit-map gives a high compression rate by consumes $2^{n-1}$ bits for $2^n$ index and child link pointers branched out of the node. The controlled-prefix expanding scheme determines the number of address bits represented by all root node of each trie's level. At this time, controlled-prefix scheme use a dynamic programming technique to get a smallest trie memory size with given number of trie's level. This paper proposes standard that can choose suitable trie structure depending on memory size of system and the required IP lookup speed presenting optimal memory size and the lookup speed according to trie level number.

• Journal of Digital Contents Society
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• v.11 no.1
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• pp.91-97
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• 2010

Flash memory has been used by many digital devices for data storage, exploiting the advantages of non-volatility, low power, stability, and so on, with the help of high integrity, large capacity, and low price. As the fast growing popularity of flash memory, the density of it increases so significantly that its entire address mapping table becomes too big to be stored in SRAM. This paper proposes the associated page address cache with an efficient table management scheme for hybrid flash translation layer mapping. For this purpose, all tables are integrated into a map block containing entire physical page tables. Simulation results show that the proposed scheme can save the extra memory areas and decrease the searching time with less 2.5% of miss ratio on PC workload and can decrease the write overhead by performing write operation 33% out of total writes requested.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.396-396
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• 2013

The resistive random access memory (ReRAM) has several advantages to apply next generation non-volatile memory device, because of fast switching time, long retentions, and large memory windows. The high mobility of monolayered graphene showed several possibilities for scale down and electrical property enhancement of memory device. In this study, the monolayered graphene grown by chemical vapor deposition was transferred to $SiO_2$ (100 nm)/Si substrate and glass by using PMMA coating method. For formation of metal-oxide nanoparticles, we used a chemical reaction between metal films and polyamic acid layer. The 50-nm thick BPDA-PDA polyamic acid layer was coated on the graphene layer. Through soft baking at $125^{\circ}C$ or 30 min, solvent in polyimide layer was removed. Then, 5-nm-thick indium layer was deposited by using thermal evaporator at room temperature. And then, the second polyimide layer was coated on the indium thin film. After remove solvent and open bottom graphene layer, the samples were annealed at $400^{\circ}C$ or 1 hr by using furnace in $N_2$ ambient. The average diameter and density of nanoparticle were depending on annealing temperature and times. During annealing process, the metal and oxygen ions combined to create $In_2O_3$ nanoparticle in the polyimide layer. The electrical properties of $In_2O_3$ nanoparticle ReRAM such as current-voltage curve, operation speed and retention discussed for applictions of transparent and flexible hybrid ReRAM device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.20-20
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• 2007

Nanowire-based field-effect transistors (FETs) decorated with nanoparticles have been greatly paid attention as nonvolatile memory devices of next generation due to their excellent transportation ability of charge carriers in the channel and outstanding capability of charge trapping in the floating gate. In this work, top-gate single ZnO nanowire-based FETs with and without Au nanoparticles were fabricated and their memory effects were characterized. Using thermal evaporation and rapid thermal annealing processes, Au nanoparticles were formed on an $Al_2O_3$ layer which was semi cylindrically coated on a single ZnO nanowire. The family of $I_{DS}-V_{GS}$ curves for the double sweep of the gate voltage at $V_{DS}$ = 1 V was obtained. The device decorated with nanoparticles shows giant hysterisis loops with ${\Delta}V_{th}$ = 2 V, indicating a significant charge storage effect. Note that the hysterisis loops are clockwise which result from the tunneling of the charge carriers from the nanowire into the nanoparticles. On the other hand, the device without nanoparticles shows a negligible countclockwise hysterisis loop which reveals that the influence of oxide trap charges or mobile ions is negligible. Therefore, the charge storage effect mainly comes from the nanoparticles decorated on the nanowire, which obviously demonstrates that the top-gate single ZnO nanowire-based FETs decorated with Au nanoparticles are the good candidate for the application in the nonvolatile memory devices of next generation.

• Journal of information and communication convergence engineering
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• v.19 no.4
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• pp.234-240
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• 2021

As the number of pet dog-related businesses is rising rapidly, there is an increasing need for reliable pet dog health information systems for casual pet owners, especially those caring for older dogs. Our goal is to implement a mobile pre-diagnosis system that can provide a first-hand pre-diagnosis and an appropriate coping strategy when the pet owner observes abnormal symptoms. Our previous attempt, which is based on the fuzzy C-means family in inference, performs well when only relevant symptoms are provided for the query, but this assumption is not realistic. Thus, in this paper, we propose a hybrid inference structure that combines fuzzy association memory and a double-layered fuzzy C-means algorithm to infer the probable disease with robustness, even when noisy symptoms are present in the query provided by the user. In the experiment, it is verified that our proposed system is more robust when noisy (irrelevant) input symptoms are provided and the inferred results (probable diseases) are more cohesive than those generated by the single-phase fuzzy C-means inference engine.

• Advances in nano research
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• v.14 no.3
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• pp.261-271
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• 2023

The present study follows three main goals. First, an analytical solution with high accuracy is developed to assess the effects of embedding pre-strained shape memory alloy (SMA) wires on the critical buckling temperatures of rectangular sandwich plates made of soft core and graphite fiber/epoxy (GF/EP) face sheets based on piecewise low-order shear deformation theory (PLSDT) using Brinson's model. As the second goal, this study compares the effects of SMAs on the thermal buckling of sandwich plates with those of carbon nanotubes (CNTs). The glass transition temperature is considered as a limiting factor. For each material, the effective ranges of operating temperature and thickness ratio are determined for real situations. The results indicate that depending on the geometric parameters and thermal conditions, one of the SMAs and CNTs may outperform the other. The third purpose is to study the thermal buckling of sandwich plates with advanced hybrid SMA/CNT/GF/EP composite face sheets. It is shown that in some circumstances, the co-incorporation of SMAs and CNTs leads to an astonishing enhancement in the critical buckling temperatures of sandwich plates.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.649-650
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• 2008

In order to resolve mechanical limit in HDD, recently, the hybrid hard disk combining HDD and a flash memory was launched. In this paper, we propose a simulator for hybrid hard disk which considers redirection, flushing and spin-down function to complement the difference between HDD and hybrid hard disk. The simulator was implemented in linux kernel 2.6.20 by modifying system calls related with file system. The experiment shows that the power consumption of hybrid hard disk is 47% smaller than that of hard disk in laptop PC.

• 한국전산유체공학회:학술대회논문집
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• 2006.05a
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• pp.275-278
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• 2006

Japan Aerospace Exploration Agency has introduced a new terascale clusterd SMP system as a main compute engine of Numerical Simulator III for aerospace science and engineering research purposes. The system is using Fujitsu PRIMEPOWER HPC2500; it has computing capability of 9.3Tflop/s peak performance and 3.6TB of user memory, with about 1,800 scalar processors for computation. In this paper, we first present the performance evaluation results for aerospace CFD applications with hybrid programming paradigm used at JAXA. Next we propose a performance prediction formula for hybrid codes based on a simple extension of AMhhal's law, and discuss about the predicted and measured performances for some typical hybrid CFD codes.

• Structural Engineering and Mechanics
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• v.42 no.6
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• pp.783-797
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• 2012

A new hybrid meta-heuristic optimization algorithm is presented for design of structures. The algorithm is based on the concepts of the charged system search (CSS) and the particle swarm optimization (PSO) algorithms. The CSS is inspired by the Coulomb and Gauss's laws of electrostatics in physics, the governing laws of motion from the Newtonian mechanics, and the PSO is based on the swarm intelligence and utilizes the information of the best fitness historically achieved by the particles (local best) and by the best among all the particles (global best). In the new hybrid algorithm, each agent is affected by local and global best positions stored in the charged memory considering the governing laws of electrical physics. Three different types of structures are optimized as the numerical examples with the new algorithm. Comparison of the results of the hybrid algorithm with those of other meta-heuristic algorithms proves the robustness of the new algorithm.

• Journal of the Korea Society of Computer and Information
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• v.18 no.4
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• pp.27-34
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• 2013

Mobile robot has the exploration function in order to perform its own task. Robot exploration can be used in many applications such as surveillance, rescue and resource detection. The workspace that robots performed in was complicated or quite wide, the multi search using the several mobile robots was mainly used. In this paper, we proposed a scheme that all areas are searched for by using one robot. The method to be proposed extract a area that can be explored in the workspace then the robot investigates the area and updates the map at the same time. The explored area is saved as a hybrid map that combines the nice attributes of the grid and topological maps. The robot can produce the safe navigation route without the obstacles by using hybrid map. The proposed hybrid map uses less memory than a grid map, but it can be used for complete coverage with the same efficiency of a topological map. Experimental results show that the proposed scheme can generate a map of an environment with only 6% of the memory that a grid map requires.