• ETRI Journal
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• v.22 no.1
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• pp.20-29
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• 2000

In this paper, we present a design of video and audio single chip encoder/decoder for portable multimedia application. The single-chip called as video audio signal processor (VASP) consists of a video signal processing block and an audio single processing block. This chip has mixed hardware/software architecture to combine performance and flexibility. We designed the chip by partitioning between video and audio block. The video signal processing block was designed to implement hardware solution of pixel input/output, full pixel motion estimation, half pixel motion estimation, discrete cosine transform, quantization, run length coding, host interface, and 16 bits RISC type internal controller. The audio signal processing block is implemented with software solution using a 16 bits fixed point DSP. This chip contains 142,300 gates, 22 Kbits FIFO, 107 kbits SRAM, and 556 kbits ROM, and the chip size is $9.02mm{\times}9.06mm$ which is fabricated using 0.5 micron 3-layer metal CMOS technology.

• Proceedings of the KSME Conference
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• 2001.11a
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• pp.865-870
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• 2001

For pneumatic system control, we need a data transmission system with high speed and high reliability or information interchange between main computer and solenoid valves and I/O devices. This paper presents a set of design techniques for a data communication system that is mainly used for pneumatic system control. For this purpose, we first designed hardware modules for an interface between central control module and local node that handles the operation of solenoid valves. In addition we developed a communication protocol for construction of RS-485 based multidrop network, and this protocol is basically designed with a kind of polling technique. Finally we evaluated performance of the developed system. The field test results show that, even under high noise environment, the data transmission of 375Kbps rate is possible up to 1,000m without using repeater. In addition, the system developed in this research is proved to be used easily for extension of a communication network because of its module structure.

• Proceedings of the KSR Conference
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• 2007.11a
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• pp.1566-1573
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• 2007

Urban railway system that leads the urban public transportation enables the passengers to use the subway system safely and conveniently by indicating the destination of, status of approach of and other information on train through Train Destination Equipment(TDE), which is one of the important passenger services. The existing system is composed of Host Station Equipment(HSE) and operator panel that receives necessary input on train information from Total Traffic Control System(TTC), Local Station Equipment(LSE) that controls Train Destination Indicator(TDI) installed at each station, and Train Destination Indicator that ultimately displays train information to the passengers using the train system. This study aims to realize stabilized and reliable announcement system for destination of train by considering processing procedure and method of expression of inputted information of the existing system of notification of announcement of destination of train that can be applied in the RFID, which is the base technology of USN for which service expansion is easy, and to realize system that considers interface with USN and expandability with other facilities in the future.

• Journal of Korea Multimedia Society
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• v.4 no.6
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• pp.570-578
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• 2001

Boundary scan architecture test methodology was introduced to facilitate the testing of complex printed circuit board. The boundary scan architecture has a tremendous potential for real time monitoring of the operational status of a system without interference of normal system operation. In this paper, a new type of embedded controller for real time monitoring of the operational status of a system is proposed and designed by using boundary scan architecture. The proposed real time monitoring embedded controller consists of test access port controller and an embedded controller proposed real time monitoring embedded controller using boundary scan architecture can save the hard-wire resource and can easily interface with boundary scan architecture chip. Experimental results show that the real time monitoring using proposed embedded controller is more effective then the real time monitoring using host computer.

• BMB Reports
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• v.49 no.5
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• pp.263-269
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• 2016

The intestine represents the largest and most elaborate immune system organ, in which dynamic and reciprocal interplay among numerous immune and epithelial cells, commensal microbiota, and external antigens contributes to establishing both homeostatic and pathologic conditions. The mechanisms that sustain gut homeostasis are pivotal in maintaining gut health in the harsh environment of the gut lumen. Intestinal epithelial cells are critical players in creating the mucosal platform for interplay between host immune cells and luminal stress inducers. Thus, knowledge of the epithelial interface between immune cells and the luminal environment is a prerequisite for a better understanding of gut homeostasis and pathophysiologies such as inflammation. In this review, we explore the importance of the epithelium in limiting or promoting gut inflammation (e.g., inflammatory bowel disease). We also introduce recent findings on how small RNAs such as microRNAs orchestrate pathophysiologic gene regulation.

• The Journal of the Korea Contents Association
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• v.6 no.12
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• pp.59-70
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• 2006

Since communication systems software is very large and complex, it requires component based architecture for software reusability, hardware transparency, high performance, and easy software reconstruction in different applications. In order to meet these requirements, we analyze performance and inter-process communication techniques of existing CORBA IIOP, and designed a shared memory-based CORBA inter-ORB protocol that would best fit for communication systems software. The designed protocol supports the same interface and can minimize the message transfer overhead in the same host environment. The test results of our protocol compared with other protocols show that the performance is increased by about 15%-200%. We are thus assumed that our protocol can be used in developing CORBA-based component software architecture for communication systems.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.8-8
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• 2000

PICARD (Port-Interface Component Architecture for Real-time system Design) is a software architecture and environment, which is aimed to reduce development time and cost of real-time, control system. With PICARD, a control engineer can construct a control system software by assembling pre-built software components us ing interact ive graphical development environment. PICARD consists of PVM(Picard Virtual Machine) , a component library, and PICE(PIcard Configuration Editor). PVM is a real-time engine of the PICARD system which runs control tasks on a real-time operating system. The component library is composed of components which are called task blocks. PICE is a visual editor which can configure control tasks by creating data-flow diagrams of task blocks or Ladder diagrams for sequential logics. For the communication between PVM on a target system and PICE on a host computer, a simple protocol and tools for stub generation was dove]oped because RPC or CORBA is difficult to be applied for the embedded system. New features such as a byte-code based run time system and a simple and easy MMI builder are also introduced.

• Progress in Superconductivity and Cryogenics
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• v.21 no.4
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• pp.13-18
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• 2019

Superconducting junctions of topological insulator (TI) are expected to host Majorana bound state, which is essential for developing topological quantum information devices. In this study, we fabricated Josephson junctions (JJs) made of Sb-doped Bi2Se3 TI nanoribbon and PbIn superconducting electrodes. In the normal state, the axial magnetoresistance data exhibit periodic oscillations, so-called Aharonov-Bohm oscillations, due to a metallic surface state of TI nanoribbon. At low temperature of 1.5 K, the TI JJ reveals the superconducting proximity effects, such as the critical current and multiple Andreev reflections. Under the application of microwave, integer Shapiro steps are observed with satisfying the ac Josephson relation. Our observations indicate that highly-transparent superconducting contacts are formed at the interface between TI nanoribbon and conventional superconductor, which would be useful to explore Majorana bound state in TI.

• Journal of Information Display
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• v.3 no.3
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• pp.17-23
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• 2002

In this work we report methods of formation of three-dimensional structures of particles in a liquid crystal host. We found that, under the appropriate conditions, the particles are captured and dragged by the moving isotropic/nematic front during the phase transition process. This movement of the particles can be enhanced significantly or suppressed drastically with the influence of an electric field and/or with changing the conditions of the phase transition, such as the rate of cooling. As a result, a wide variety of particle structures can be obtained ranging from a fine-grained cellular structure to stripes of varying periods to a course-grained "root" structures. Changing the properties of the materials, such as the size and density of the particles and the surface anchoring of the liquid crystal at the particle surface, can also be used to control the morphology of the three-dimensional particle network and adjust the physical properties of the resulting dispersions. These particle structures may be used to affect the performance of LCD's much as polymers have been used in the past.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.9
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• pp.2189-2196
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• 2014

In this paper, a VLIW(Very Long Instruction Word) vision coprocessor which can efficiently accelerate computer vision algorithm for automotive is designed. The VLIW coprocessor executes four instructions per clock cycle via 8-stage pipelined structure and has 36 integer and floating-point instructions to accelerate computer vision algorithm for pedestrian detection. The processor has about 300-MHz operating frequency and about 210,900 gates under 45nm CMOS technology and its estimated performance is 1.2 GOPS(Giga Operations Per Second). The vision system composed of vision primitive engine and eight VLIW coprocessors can execute pedestrian detection at 25~29 frames per second(FPS). Because the VLIW coprocessor has high detection rate and loosely coupled interface with host processor, it can be efficiently applicable to a wide range of vision applications.