• 제목/요약/키워드: horizontal interconnection

검색결과 7건 처리시간 0.021초

Revenue-Sharing Regulation of Interconnection Charges

  • Kim, Jeong-Yoo;Lim, Yoon-Sung
    • 한국기술혁신학회:학술대회논문집
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    • 한국기술혁신학회 2000년도 춘계학술대회
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    • pp.483-492
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    • 2000
  • In this paper, we explore the economic principle behind the revenue-sharing rule for interconnection charges. First, we assert that firms can collude by splitting tile revenues equally i.e., choosing the revenue-sharing ratio equal to l/2. Also, we characterize the optimal revenue-sharing ratio in a model of horizontal interconnection and discuss the relation between the optimal ratio and the optimal access price.

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공용 동선공간 체계에 의한 대형병원의 형태구성에 관한 연구 (A study on the formal composition of the public circulation spaces organization in large hospitals)

  • 고영종;이정만
    • 의료ㆍ복지 건축 : 한국의료복지건축학회 논문집
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    • 제8권1호
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    • pp.13-20
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    • 2002
  • Large hospital designs try to accommodate functional needs and spatial organization. The purpose of this study is to propose an effective compositional method by horizontal interconnection of public circulation spaces with 'hospital street'. 'Hospital street' and network of public circulation spaces are major elements of consideration for the design of large hospitals, which not only connect functional components but also provide satisfying environment, amenity and patients' life.

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유연한 구조의 모듈 합성 (Module Synthesis in Flexible Architecture)

  • 오명섭;권성훈;신현철
    • 전자공학회논문지A
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    • 제32A권2호
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    • pp.140-150
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    • 1995
  • A symbolic layout generator, called Flexible Module Generator (FMG), has been developed for transgorming a given CMOS circuit netlist into an optimized symbolic layout. Contrary to other conventional module generators which place transistors either in horizontal or in vertical direction, FMG places transittors in any hence can multiples of 90$^{\circ}$. This flexible layout style can maximize the diffusion sharing and hence can reduce the wire-length for both of area minimization and performance improvement. In FMG, transistors are initially randomly placed and then selected transistors are iteratively replaced using an optimization technique based on simulated evolution. Whenever a transistor is replaced, the affected nets are rerouted. Constraints on the shape, aspect ratio, and critical path delays are considered during the optimization process. Routing is performed by using a modified maze router on polysilicon, metal 1, and metal 2 interconnection layers. additional routing grids are added, if necessary, for complete routing. Unused rows or columns are removed after routing for area minimization. Experimental reasults show that FMG synthesizes satisfactory layouts.

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칩상호 광접속용 GaAs 광전집적회로의 기본 공정 I (OEIC 개관;Zn-확산;SL 제작을 위한 초박막 성장) (GaAs OEIC Unit Processes for chip-to-chip Interconnection I (OEIC overview ; Zn-diffusion ; SL layer growing))

  • 지정근
    • 한국광학회:학술대회논문집
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    • 한국광학회 1989년도 제4회 파동 및 레이저 학술발표회 4th Conference on Waves and lasers 논문집 - 한국광학회
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    • pp.180-184
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    • 1989
  • Overviews of vertical and horizontal GaAs/AlGaAs OEIC are shown. Researching double Zn diffusion process, we obtain Xj=At1/2-Bd1, where A=2.5${\mu}{\textrm}{m}$/[hr]1/2, B=0.625, of which process is recommended for exact diffusion interface area control of GaAs/AlGaAs. It is proved to be 100A/100A AlAs/GaAs using MOCVD by measurement of photo-luminescence which shows a luminescence peak corresponding to the 798.4nm wavelength calculated values of 38meV ground state above GaAs conduction band.

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Pulse Inductively Coupled Plasma를 이용한 Through Silicon Via (TSV) 형성 연구

  • 이승환;임영대;유원종;정오진;김상철;이한춘
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2008년도 추계학술대회 초록집
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    • pp.18-18
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    • 2008
  • 3차원 패키징 System In Package (SIP)구조에서 Chip to Chip 단위 Interconnection 역할을 하는 Through Silicon Via(TSV)를 형성하기 위하여 Pulsating RF bias가 장착된 Inductively Coupled Plasma Etcher 장비를 이용하였다. 이 Pulsating 플라즈마 공정 방법은 주기적인 펄스($50{\sim}500Hz$)와 듀티($20{\sim}99%$) cycle 조절이 가능하며, 플라즈마 에칭특성에 영향을 주는 플라즈마즈마 발생 On/Off타임을 조절할 수 있다. 예를 들면, 플라즈마 발생 Off일 경우에는 이온(SFx+, O+)과 래디컬(SF*, F*, O*)의 농도 및 활성도를 급격하게 줄이는 효과를 얻을 수가 있는데, 이러한 효과는 식각 에칭시, 이온폭격의 손상을 급격하게 줄일 수 있으며, 실리콘 표면과 래디컬의 화학적 반응을 조절하여 에칭 측벽 식각 보호막 (SiOxFy : Silicon- Oxy- Fluoride)을 형성하는데 영향을 미친다. 그리고, TSV 형성에 있어서 큰 문제점으로 지적되고 있는 언더컷과 수평에칭 (Horizontal etching)을 개선하기 위한 방법으로, Black-Siphenomenon을 이번 실험에 적용하였다. 이 Black-Si phenomenon은 Bare Si샘플을 이용하여, 언더컷(Undercut) 및 수평 에칭 (Horizontal etching)이 최소화 되는 공정 조건을 간편하게 평가 할 수 있는 방법으로써, 에칭 조건 및 비율을 최적화하는 데 효율적이었다. 결과적으로, Pulsating RF bias가 장착된 Inductively Coupled Plasma Etcher 장비를 이용한 에칭실험은 펄스 주파수($50{\sim}500Hz$)와 듀티($20{\sim}99%$) cycle 조절이 가능하여, 이온(SFx+, O+)과 래디컬(SF*, F*, O*)의 농도와 활성화를 조절 하는데 효과적이었으며, Through Silicon Via (TSV)를 형성 하는데 있어서 Black-Si phenomenon 적용은 기존의 Continuous 플라즈마 식각 결과보다 향상된 에칭 조건 및 에칭 프로파일 결과를 얻는데 효과적이었다.

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전류인가 방법이 3D-SiP용 Through Via Hole의 Filling에 미치는 영향 (The Effects of Current Types on Through Via Hole Filling for 3D-SiP Application)

  • 장근호;이재호
    • 마이크로전자및패키징학회지
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    • 제13권4호
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    • pp.45-50
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    • 2006
  • 3D package의 SiP에서 구리의 via filling은 매우 중요한 사항으로 package밀도가 높아짐에 따라 via의 크기가 줄어들며 전기도금법을 이용한 via filling이 연구되어왔다. Via filling시 via 내부에 결함이 발생하기 쉬운데 전해액 내에 억제제, 가속제등 첨가제를 첨가하고 펄스-역펄스(PRC)의 전류파형을 인가하여 결함이 없는 via의 filling이 가능하다. 본 연구에서는 건식 식각 방법 중 하나인 DRIE법을 이용하여 깊이 $100{\sim}190\;{\mu}m$, 직경이 각각 $50{\mu}m,\;20{\mu}m$인 2가지 형태의 via을 형성하였다. DRIE로 via가 형성된 Si wafer위에 IMP System으로 Cu의 Si으로 확산을 막기 위한 Ta층과 전해도금의 씨앗층인 Cu층을 형성하였다. Via시편은 직류, 펄스-역펄스의 전류 파형과 억제제, 가속제, 억제제의 첨가제를 모두 사용하여 filling을 시도하였고, 공정 후 via의 단면을 경면 가공하여 SEM으로 관찰하였다.

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북촌한옥 각 실의 용도 및 공간변화 특성에 관한 연구 - 개방한옥과 공공매입한옥을 중심으로 - (A Study on Changes in the Space Composition of Each Room in Bukchon Hanok - Focused on Open-Hanoks and Publicly Puhased Hanoks -)

  • 김도연;오혜경
    • 가정과삶의질연구
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    • 제26권2호
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    • pp.115-127
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    • 2008
  • The purpose of this study was to examine the characteristics of change in the composition of indoor spaces in Korean-style houses which have been repaired and improved extensively through the 'Bukchon Improvement Project' and are being utilized for public purposes. For this, we conducted a field survey through visiting the house sites from the 5th to the 26th of May, 2006. Conclusions drawn from this study are as follows. Bukchon Korean-style houses maintain centripetal space composition, in which the rooms surround the court. Centering on the court, the hierarchy of spaces is determined, and the hierarchy of spaces and the composition of internal layout are restructured centering on the court and the main hall without change in direction and position. The main hall is sometimes converted to a room, but it maintains an open space relation with other spaces centering on the court, and therefore, even after its use has been changed, it is still the most Korean-style space. In addition, with floor heating, the common sitting-style life is maintained continuously although the rooms have been converted and standing-style furniture is used. In this way, publicly promoted policies for Korean-style houses are allowed within the limit that the appearance is maintained and the internal spaces do not change the overall structure. However, in order to maintain the tradition of Korean-style houses and utilize them as various spaces, the following supplementations are necessary. First, the main hall and the inner court of a Koreanstyle house should be utilized actively. The court sometimes keeps individuals' privacy or expands the space by extending the view to outdoor spaces, and is sometimes used as an open space through interconnection between the inside and the outside of the house. Second, consideration should be given to vertical spaces. Horizontal expansion causes a change of floor plan. Thus, space should be secured using various cross-sectional changes, such as a kitchen and a loft over the kitchen. Third, structure should be changeable in order to adjust the size of spaces. Thus, through research on traditional windows, we need to develop changeable walls that can be installed and removed easily according to the use of spaces.