• Journal of Pharmaceutical Investigation
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• v.25 no.3
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• pp.239-247
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• 1995

The physico-chemical stability of aucubin, a hepatoprotective iridoid glucoside, in buffered aqueous solutions was studied using a stability-indicating reversed-phase high performance liquid chromatography. The degradation of aucubin followed the pseudo-first-order kinetics. In strong acidic regions, aucubin was rapidly degraded by the specific acid catalysis, forming dark brown precipitates. From the rate-pH profiles, it was found that aucubin was most stable at the pH of about 10. From the temperature dependence of degradation, activation energies for aucubin at pH 2.1 and 4.9 were calculated to be 22.0 and 24.3 kcal/mole, respectively. The shelf-life $(t_{90%})$ for aucubin at pH 9.07 and $20^{\circ}C$ was predicted to be about 603 days. A higher ionic strength accelerated the degradation of aucubin at pH 4.01. The effect of metal ions on the degradation rate of aucubin at pH 7.16 was in the rank order of $Cu^{2+}\;>\;Fe^{3+}\;>\;Co^{2+}\;>\;Fe^{2+}\;>\;Mg^{2+}$. On the other hand, $Mn^{2+}\;and\;Ba^{2+}$ slowed the degradation rate.

• The Bulletin of The Korean Astronomical Society
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• v.36 no.2
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• pp.92.1-92.1
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• 2011

NASA launched Solar Dynamics Observatory (SDO) on February 2011 in order to understand the cause of solar activities and their influences on the Earth and the near-Earth space. KASI is constructing Korean Data Center for SDO based on the letter of agreement between KASI and NASA for space weather research. SDO produces about 1.5 TB a day and its raw data amounts to about 550 TB in a year. Stanford University has been already operating the data center for scientific raw data, but there is a limit to use its data for space weather research and space weather service in real time because of network environment. Korean Data Center for SDO will provide scientific data not only to Korean institutes but also to international space weather societies. KASI has designed the data transfer system by using GLORIAD in order to get higher performance and stability. After the first construction of data transfer system and storage system in this year, we will increase the storage capacity of the data center in phases considering new developments in a storage technology and drop of their prices.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.67.1-67.1
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• 2012

Graphene has attracted much attention for future nanoelectronics due to its superior electrical properties. Owing to its extremely high carrier mobility and controllable carrier density, graphene is a promising material for practical applications, particularly as a channel layer of high-speed FET. Furthermore, the planar form of graphene is compatible with the conventional top-down CMOS fabrication processes and large-scale synthesis by chemical vapor deposition (CVD) process is also feasible. Despite these promising characteristics of graphene, much work must still be done in order to successfully develop graphene FET. One of the key issues is the process technique for gate dielectric formation because the channel mobility of graphene FET is drastically affected by the gate dielectric interface quality. Formation of high quality gate dielectric on graphene is still a challenging. Dirac voltage, the charge neutral point of the device, also strongly depends on gate dielectrics. Another performance killer in graphene FET is source/drain contact resistance, as the contact resistant between metal and graphene S/D is usually one order of magnitude higher than that between metal and silicon S/D. In this presentation, the key issues on graphene-based FET, including organic-inorganic hybrid gate dielectric formation, controlling of Dirac voltage, reduction of source/drain contact resistance, device structure optimization, graphene gate electrode for improvement of gate dielectric reliability, and CVD graphene transfer process issues are addressed.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.1
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• pp.10-21
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• 2003

During seek operation in disk drives, the recording head is moved toward desired track by seek servo controller and then is settled onto the center of the desired track by settling servo controller. If the head speed at the start of settling servo control is not slow, it may produce overshoot relative to the center of track and thus extend the settling time. The degradation in settling performance will be more severe as the track width becomes smaller for higher density of data storage. We design a new settling servo controller for minimizing settling time based on the pole-zero cancellation. In order to cancel slow poles in settling response, we apply discrete pulse signals to the system in addition to the state feedback control. For exact pole-zero cancellation, we consider the dynamics of power amplifier used for actuator current regulation and the effects of delay in control action. In addition, we present system parameter identification algerian for the robustness of our controller to system parameter variation. In order to demonstrate the practical use of our controller, we present experimental results obtained by using a commercially available disk drive.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.109-119
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• 2003

o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1265-1274
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• 2018

This paper proposes a virtual flux (VF) and positive-sequence power based control strategy to improve the performance of grid-interfaced three-phase voltage source converters against unbalanced and distorted grid conditions. By using a second-order generalized integrator (SOGI) based VF observer, the proposed strategy achieves an AC voltage sensorless and grid frequency adaptive control. Aiming to realize a balanced sinusoidal line current operation, the fundamental positive-sequence component based instantaneous power is utilized as the control variable. Moreover, the fundamental negative-sequence VF feedforward and the harmonic attenuation ability of a sequence component generator are employed to further enhance the unbalance regulation ability and the harmonic tolerance of line currents, respectively. Finally, the proposed scheme is completed by combining the foregoing two elements with a predictive direct power control (PDPC). In order to verify the feasibility and validity of the proposed SOGI-VFPDPC, the scenarios of unbalanced voltage dip, higher harmonic distortion and grid frequency deviation are investigated in simulation and experimental studies. The corresponding results demonstrate that the proposed strategy ensures a balanced sinusoidal line current operation with excellent steady-state and transient behaviors under general grid conditions.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.10
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• pp.65-72
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• 2015

Recently, LED light has been increasingly adopted for vehicles in both domestic and foreign automotive markets, while a variety of LED lights have been developed to be used particularly for headlamps. In this paper, we propose an H-type resonant snubber circuit topology for high efficiency of vehicle LDM (LED Driver Module) and realized LDM functions for vehicle headlamp by designing high-efficiency convertors. In addition, this study reduced the financial burden by configuring the system to control the whole with micom except for the use of individual dedicated chips to drive LED for high and low beam. In order to verify the validity of the proposed H-type resonant snubber capable of soft switching, simulations were performed using PSIM. As a result, the validity was experimentally verified by creating a prototype. Moreover, in order to actually attach the headlamp, the performance of the proposed convertor was confirmed by designing LDM to the limited size. Communications between the headlamp and higher controller were realized using LIN(Local Interconnect Network).

• International Journal of Quality Innovation
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• v.3 no.2
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• pp.13-28
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• 2002

Higher efficiency and effectiveness of Research & Development phases can be attained using advanced statistical methodologies. In this work statistical methodologies are combined with a deterministic approach to engineering design. In order to show the potentiality of such integration, a simple but effective example is presented. It concerns the problem of optimising the performances of a paper helicopter. The design of this simple device is not new in quality engineering literature and has been mainly used for educational purposes. Taking full advantage of fundamental engineering knowledge, an aerodynamic model is originally formulated in order to describe the flight of the helicopter. Screening experiments were necessary to get first estimates of model parameters. Subsequently, deterministic evaluations based on this model were necessary to set up further experimental phases needed to search (or a better design. Thanks to this integration of statistical and deterministic phases, a significant performance improvement is obtained. Moreover, the engineering knowledge かms out to be developed since an explanation of the “why” of better performances, although approximate, is achieved. The final design solution is robust in a broader sense, being both validated by experimental evidence and closely examined by engineering knowledge.

• Journal of the Korea Society of Computer and Information
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• v.7 no.1
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• pp.112-119
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• 2002

We propose an enhanced wavelet packet image coder algorithm which is based on the coefficients partition. The proposed wavelet packet image coder uses the first-order entropy to reduce the total compression time, and achieves low bit rates and rate-distortion performance by the zero-tree based coding using correlations between coefficients partition. This new algorithm represents new parent-children relationships for reducing image reconstruction error using the correlations between each frequency subbands and then the wavelet packet coefficients are Partitioned by a new order. The computer simulations demonstrate higher PSNR under the same bit rate and improved image compression time and enhanced rate control compare with conventional algorithms. From the simulation results, it is shown that the encoding and decoding process of proposed coder are much simple and accurate than present method against texture images , which include many mid-frequency elements.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.7
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• pp.3583-3598
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• 2019

In order to improve the reliability and repair efficiency of distributed storage systems, minimum bandwidth regenerating (MBR) codes based on cyclic variable fractional repetition (VFR) codes are constructed in this thesis, which can repair failed nodes accurately. Specifically, in order to consider the imbalance of data accessed by the users, cyclic VFR codes are constructed according to that data with different heat degrees are copied in different repetition degrees. Moreover, we divide the storage nodes into groups, and construct MBR codes based on cyclic VFR codes to improve the file download speed. Performance analysis and simulation results show that, the repair locality of a single node failure is always 2 when MBR codes based on cyclic VFR codes are adopted in distributed storage systems, which is obviously superior to the traditional MBR codes. Compared with RS codes and simple regenerating codes, the proposed MBR codes based on cyclic VFR codes have lower repair locality, repair complexity and bandwidth overhead, as well as higher repair efficiency. Moreover, relative to FR codes, the MBR codes based on cyclic VFR codes can be applicable to more storage systems.