• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.15 no.12 s.91
• /
• pp.1161-1167
• /
• 2004

The conventional PLL(phase locked loop) frequency synthesizer takes a long switching time because of the inherent closed-loop structure. The digital hybrid PLL(DH-PLL) which includes the open-loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are the serious problem because the DLT(digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO(voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit for the very small over-shoot and shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. The hardware complexity gets decreased to about $28\%,$ as compared with the conventional DH-PLL. The high speed switching characteristic of the frequency synthesis process can be verified by the computer simulation and the circuit implementation.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.358-361
• /
• 1999

In auxiliary block of high speed train power factor correction and harmonics reduction is very important issue for efficient energy transport. The GTO-equipped PWM converter is used for traction untill resently. But the rising power capability of IGBTs resently allows to build IGBT-equipped PWM converter with a considerably increased switching frequency. This paper presents switching pattern, control method, operation mode and tuned filter to reduce dc link voltage ripple for paralleled converter.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 1999.11a
• /
• pp.162-167
• /
• 1999

In Auxiliary block of High speed train Power factor correction and Harmonics reduction is very important issue for efficient energy transport. The GTO-equipped PWM converter is used for traction untill resently. but the rising power capability of IGBTs resently allows to build IGBT-equipped PWM converter with a considerably increases switching frequency. In this paper presents switching pattern, control method, operation mode and tuned filter to reduce dc link voltage ripple for paralleled converter.

• Transactions of The Korea Fluid Power Systems Society
• /
• v.1 no.4
• /
• pp.15-21
• /
• 2004

High speed on-off electro-magnetic valves have been used for pressure control or flow control in automotive or construction machine servomechanisms. These systems require quicker valve switching speed to improve control preciseness. The authors designed and manufactured an electric valve driver with quick response characteristics by using 3 power source type valve driver concept. In experiments by using a hydraulic system incorporating the new valve driver, the new driver shortened the switching lag time from 5 ms to 1.3 ms. And also the new driver showed excellent position tracking control performances.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
• /
• 2002.04a
• /
• pp.190-198
• /
• 2002

In switched reluctance motor(SRM) drive, it is necessary to synchronize the stator phase excitation with the rotor position. Therefore the rotor position information is an essential. Usually optical encoders or resolvers are used to provide the rotor position information. These sensors are expensive and are not suitable for high speed operation. In general, the accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor. But the region of high speed, switching angles are fluctuated back and forth from the preset values, witch are cause by the sampling period of the microprocessor. Therefore, the low cost linear encoder suitable for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using the simple digital logic circuit is also presented in this paper It is verified from the experiments that the proposed encoder and logic controller can be a powerful candidate for the practical low cost SRM drive.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.2 no.2
• /
• pp.267-273
• /
• 1998

In this paper, we designed a charge pump with a differential current switching structure and it was made of a MESFET with high speed switching Property compared with CMOSFETs. The charge pump with a differential current switching structure is analyzed about operating property of circuit in high frequency band. Also we propose a method on it's characteristics estimation. The designed circuit is simulated by HSPICE simulator, and in view of the results we think that the charge pump of this study can be used in circuits of 1 GHZ frequency band grade.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.4 no.2
• /
• pp.111-121
• /
• 1999

This paper deals with an active gate drive (AGD) technolo밍T for high power IGBTs. It is based on an optimal c combination of several requirements necessmy for good switching performance under hard switching conditions, The s scheme specifically combines together the slow drive requirements for low noise and switching stress and the fast driver requirements for high speed switching and low switching energy loss The gate drive can also effectively dampen oscillations during low cunent turnlongrightarrowon transient in the IGBT, This paper looks at the conflicting requirements of the c conventional gate dlive circuit design and the experimental results show that the proposed threelongleftarrowstage active gate dlive t technique can be an effective solution.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.151-154
• /
• 1999

This paper presents a driving method of 3-phase 4-poles SRM(switched reluctance motor) drived by switching angle control. In this study, the switching angle is determined from approximated analysis and computer simulation by using MATLAB for high efficiency according to the speed and torque required by load, and then microcontroller controls the switching angle of asymmetrical inverter in SRM driver. Also, we experiment the maximum forque driving and maximum power driving by controlling switching angle available to electric vehicle.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.11
• /
• pp.84-91
• /
• 2009

A high speed serial link transmitter using multi-level signaling is proposed. To achieve high data rate m high speed serial link, 4-pulse amplitude modulation (PAM) is used. By transmitting 2 bit data in each symbol time, high speed data transmission, two times than binary signaling, is achieved. The transmitter transmits current-mode output instead of voltage-mode output Current-mode output is much faster than voltage-mode output, so higher data transmission is available by increasing switching speed of driver. $2^5-1$ pseudo-random bit sequence (PRBS) generator is contained to perform built-in self test (BIST). The 4-PAM transmitter is designed in Dongbu HiTek $0.18{\mu}m$ CMOS technology and achieves 8 Gb/s, 160 mV of eye height with 1.8 V supply voltage. The transmitter consumes only 98 mW for 8 Gb/s transmission.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.1
• /
• pp.143-148
• /
• 2013

When the fault occurs in power system, the fault-current exceeds breaking capacity of the circuit breaker. So, reliablity of the power system is decreased sharply. Superconducting fault-current limiter (SFCL) is operated without impedance in normal state. The fault-current is limited by its impedance during the fault condition. However, the SFCL has several weak points such as huge size, high-price, liquid-nitrogen operation for the real power system. In this paper, We suggested the high-speed interrupter to limit the fault-current in case of the single line-to-ground fault. In addition, we compared the high-speed interrupter with the SFCL to ensure the operation reliability. The proposed interrupter detected the fault-current through the CT, and the power was supplied by operation of the SCR control system. In this experiment, the power of high-speed interrupter was applied after the 4.8[msec] from fault instant. The on-off operation of the interrupter was started after half-cycle from the fault. The fault-current was flowed into the impedance element by the switching operation of the high-speed interrupter. So, the fault current was limited within one cycle, and then it didnt exceed the capacity of a circuit breaker. We confirmed that there was slight difference between the SFCL with high-speed interrupter in terms of limiting-time of the fault-current and switching speed of the SCR. The high-speed interrupter was considered to be more efficient than the SFCL in size, cost or reliability.