• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 1992.11a
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• pp.47-50
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• 1992

In this paper, the authors propose a so-called new zero voltage switching circuit topology arts an improved PWM strategy. In order to minimize voltage stress in dc-ac high switching frequency power conversion, the proposal circuit is used as interface between DC sully and the PWM inverter. The new ZVS circuit provide PWM inverter with a short zero voltage period in the dc 1ink just before inverter switches operate. By using the proposed modulating signal (transformational sinewave) art carrier sinal (sawtooth ware), the amplitude of the fundamental component is increased about 15 percent more than that of a conventional sinusoidal modulating signal and triangular carrier signal, the switching tosses is reduced. Some simulative results on computer are included to confirm the validity of the analytical results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.760-770
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• 2016

A 12-bit 750 kS/s Dual-Sampling Successive Approximation Register Analog-to-Digital Converter (SAR ADC) technique with reduced Capacitive DAC (CDAC) is presented in this paper. By adopting the Adaptive Power Control (APC) technique for the two-stage latched type comparator and using bootstrap switch, power consumption can be reduced and overall system efficiency can be optimized. Bootstrapped switches also are used to enhance the sampling linearity at a high input frequency. The proposed SAR ADC reduces the average switching energy compared with conventional SAR ADC by adopting reduced the Most Significant Bit (MSB) cycling step with Dual-Sampling of the analog signal. This technique holds the signal at both comparator input asymmetrically in sample mode. Therefore, the MSB can be calculated without consuming any switching energy. The prototype SAR ADC was implemented in $0.18-{\mu}m$ CMOS technology and occupies $0.728mm^2$. The measurement results show the proposed ADC achieves an Effective Number-of-Bits (ENOB) of 10.73 at a sampling frequency of 750 kS/s and clock frequency of 25 MHz. It consumes only 0.13 mW from a 5.0-V supply and achieves the INL and DNL of +2.78/-2.45 LSB and +0.36/-0.73 LSB respectively, SINAD of 66.35 dB, and a Figures-of-Merit (FoM) of a 102 fJ/conversion-step.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8A
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• pp.712-719
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• 2012

This paper presents Single-bit Third order Delta-Sigma Modulator, which can be applied to the Low speed High resolution ADC in Audio signal Process System. Whereas the Operational Amplifier in modulator consumed static power dissipation in operating, this modulator used Switching on/off techniques, which makes the Power dissipation of the modulator reduced. Also proposed modulator minimizes frequency characteristic variation by optimizing switch position. And this modulator chooses Single-bit type to guarantee stability. The designed ADC went through 0.35um CMOS n-well 1-poly 4-metal process to be a final product, and the final product has shown 17.1mW of power dissipation with 3.3V of Supply Voltage, 6.4MHz of conversion rate. And 84.3dB SNDR and 13.5bit ENOB with 20KHz of input frequency.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2300-2307
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• 2008

This study receives the noise transmitted in a constant audio frequency range through a microphone array in which the noise(like grease in a pan) occurs on the power supply line due to the troublesome partial discharge(arc). Then by going through a series of signal processing of removing noise, this study measures the distance and direction up to the noise caused by the troublesome partial discharge(arc) and monitors the result by displaying in the analog and digital method. After these, it determines the state of each size and judges the distance and direction of problematic part. When the signal sound transmitted by the signal source of bad insulator is received on each microphone, the signal comes only in the frequency range of 20 kHz by passing through the circuit of amplification and 6th low pass filter. Then, this signal is entered in a digital value of digital signal processing(TMS320F2812) through the 16-bit A/D conversion. By doing so, the sound distance, direction and coordinate of bad insulator can be detected by realizing the correlation method of detecting the arriving time difference occurring on each microphone and the algorithm of detecting maximum time difference.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.88-90
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• 2012

This paper describes a 10-bit 10-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) with a rail-to-rail input range. The proposed SAR ADC consists of a capacitor digital-analog converter (DAC), a SAR logic and a comparator. To reduce the frequency of an external clock, the internal clock which is asynchronously generated by the SAR logic and the comparator is used. The time-domain comparator with a offset calibration technique is used to achieve a high resolution. To reduce the power consumption and area, a split capacitor-based differential DAC is used. The designed asynchronous SAR ADC is fabricated by using a 0.18 um CMOS process, and the active area is $420{\times}140{\mu}m^2$. It consumes the power of 0.818 mW with a 1.8 V supply and the FoM is 91.8 fJ/conversion-step.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.11a
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• pp.337-340
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• 2007

In the dissertation, a power conversion system for fuel cell is composed of a PWM inverter with LC filter in order to convert fuel cell voltage to a single phase 220[V], In addition, new insulated DC-DC converters are proposed in order that fuel cell voltage is boosted to 380[V]. In this paper, it requires smaller components than existing converters, which makes easy control. The proposed DC-DC converter controls output power by the adjustment of phase-shift width using switch S5 and S6 in the secondary switch, which provides 93-97[%] efficiency in the wide range of output voltage. Fuel cell simulator is implemented to show similar output characteristics to actual fuel cell. Appropriate dead time td enables soft switching to the range where the peak value of excitation current in a high frequency transformer is in accordance with current in the primary circuit. Moreover, appropriate setting to serial inductance La reduces communication loss arisen at light-load generator and serge voltage arisen at a secondary switch and serial diode. Finally, TMS320C31 board and EPLD using PWM switching technique to act a single phase full-bridge inverter which is planed to make alternating current suitable for household.

• Proceedings of the KIEE Conference
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• 2007.04c
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• pp.156-158
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• 2007

Laser wave length can have evaporation effect by absorption because outer skin or tissue of focus is consisted of water almost though absorption of water occurs more than 90% almost in formation thickness of very thin floor Can operate outer skin, steam by floor and correct incision of formation is available. Suture surgical operation is avaliable to vein or lymph system and surgical operation region can dry and see as eye and radish bleeding surgical operation is avaliable Specially, stability of tube both end output about pulse by weight very, this research can cause various curative effect because can reduce bulk and control easily current wave style of medical laser using electric power conversion device of high frequency way. If introduce ZVS (Zero Voltage Switching) or ZVZCS (Zero Voltage and Zero Current Switching), is more profitable because can reduce switching damage Because electric power department of proposed medical laser can do stable soft-switching in wide subordinate extent introducing ZVZCS technique by the first help and control department composes microcontroller, output current waveform user have free form make. Result that experiment because design and manufacture, brought result that improve of 20% than existing equipment, and will be bought to get into superior result if supplement as systematic late.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1326-1331
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• 2001

This paper has been studied about design of a transceiver for data transmission. The transceiver has bandwidth of 424.7~424.95 MHz and uses half duplex communication method, PLL synthesized, 20 channel, 12.5 KHz channel bandwidth and FSK modulation/demodulation method. The transmission set is designed using low noise amplifier and power amplifier Also, it consists of low pass filter and resonation circuit for decrease of spurious signal. The receiver set is designed using dual conversion method. Finally, the transceiver set achieves the following characteristics 9.71dbm output power, 47dbc spurious property and $\pm$12.3 Jitter at sensitivity of -1134dbm.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.52-54
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• 2007

Laser wave length can have evaporation effect by absorption because outer skin or tissue of focus is consisted of water almost though absorption of water occurs more than 90% almost in formation thickness of very thin floor. Can operate outer skin, steam by floor and correct incision of formation is available. Suture surgical operation is available to vein or lymph system and surgical operation region can dry and see as eye and radish bleeding surgical operation is available. Specially, stability of tube both end output about pulse by weight very, this research can cause various curative effect because can reduce bulk and control easily current wave style of medical laser using electric power conversion device of high frequency way. If introduce ZVS (Zero Voltage Switching) or ZVZCS (Zero Voltage and Zero Current Switching), is more profitable because can reduce switching damage. Because electric power department of proposed medical laser can do stable soft-switching in wide subordinate extent introducing ZVZCS technique by the first help and control department composes microcontroller, output current waveform user have free form make. Result that experiment because design and manufacture, brought result that improve of 20% than existing equipment, and will be bought to get into superior result if supplement as systematic late.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.128-133
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• 2006

This paper describes a high speed interface circuit using redundant multi-valued logic for high speed communication ICs. This circuit is composed of encoding circuit that serial binary data are received and converted into parallel redundant multi-valued data, and decoding circuit that converts redundant multi-valued data to parallel binary data. Because of the multi-valued data conversion, this circuit makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, the proposed 1:4 DEMUX (demultiplexer, serial-parallel converter), was designed using a 0.35um standard CMOS technology. Proposed DEMUX is achieved an operating speed of 4.5Gb/s with a supply voltage of 3.3V and with power consumption of 53mW. The operating speed of this circuit is limited by the maximum frequency which the 0.35um process has. Therefore, this circuit is to achieve CMOS communication ICs with an operating speed greater than 10Gb/s in submicron process of high operating frequency.