• Transactions of the Korean Society of Mechanical Engineers B
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• v.39 no.10
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• pp.825-829
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• 2015

Theoretical calculations suggest that the thermoelectric figure of merit (ZT) can be improved by introducing a core-shell heterostructure to a semiconductor nanowire because of the reduced thermal conductivity of the nanowire. To experimentally verify the decrease in thermal conductivity in core-shell nanowires, the thermal conductivity of Ge-SixGe1-x core-shell nanowires grown by chemical vapor deposition (CVD) was measured using suspended microdevices. The silicon composition (Xsi) in the shells was measured to be about 0.65, and the remainder of the germanium in the shells was shown to play a role in decreasing defects originating from the lattice mismatch between the cores and shells. In addition to the standard four-point current- voltage (I-V) measurement, the measurement configuration based on the Wheatstone bridge was attempted to enhance the measurement sensitivity. The measured thermal conductivity values are in the range of 9-13 W/mK at room temperature and are lower by approximately 30 than that of a germanium nanowire with a comparable diameter.

• Korean Journal of Materials Research
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• v.9 no.5
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• pp.460-466
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• 1999

The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

• Korean Journal of Optics and Photonics
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• v.15 no.5
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• pp.469-474
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• 2004

We have fabricated and designed wavelength-tunable sampled grating distributed Bragg reflector laser diodes(SGDBR-LD) by using, for the first time, planar buried heterostructures(PBH). The diodes have low threshold current values and high-performance of laser operation. Growth condition using metal organic chemical vapor deposition(MOCVD) was optimized for the formation of a good butt-coupling at the interface. A maximum output power of the fabricated device was 20 mW under 200 mA continuous wave(CW) operation at $25^{\circ}C$. Average threshold current and voltage were 12 mA and 0.8 V, approximately. This output power is higher than those of ridge waveguide(RWG) and buried ridge stripe(BRS) structures by amounts of 9 mW and 13 mW, respectively. We obtained a tuning range of 44.4nm which is well matched with the target value of our design. The side mode suppression ratio of more than 35 dB was obtained for the whole tuning range. Optical output power variation was less than 5 dB, which is 4 dB smaller than that of RWG structures.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.33-37
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• 2019

In this study, the graded thermal properties of composites are obtained by difference in specific gravity of fillers including Cu, h-BN and GO powders in epoxy. Relatively heavy powders such as Cu and h-BN compared to GO mostly at the bottom layer, while light GO powders were dispersed in the top layer in the composites. The thermal conductivity of composites was gradually increased from 0.55 (0.52) W/mK to 2.82 (1.37) W/mK for GO/h-BN (GO/Cu) epoxy composites from surface to bottom. On the contrary, the coefficient of thermal expansion was decreased from 51 ppm/℃ to 23 ppm/℃ and from 57 ppm/℃ to 32 ppm/℃ for GO/Cu and GO/h-BN, respectively. The variation of thermal properties in composites is attributed due to intrinsic material properties of filler including thermal conductivity, morphology and the distribution by the specific weight of fillers. This simple strategy for realizing graded thermal composites by introducing different filler materials would be effective heat transfer at interface of heterostructure with large thermal properties such as inorganic semiconductor/plastic, metal/plastic, and semiconductor/metal.

• Korean Journal of Optics and Photonics
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• v.9 no.2
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• pp.111-116
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• 1998

Thirteen InGaAs/InGaAsP separate-confinement heterostructure multiple quantum well lasers were designed such that the strain in the active layer from 0.9% compressive strain to 1.4% tensile, and their threshold current density was caluculated to see the effects of strain on the threshold current density. The well width was adjusted such that the bandgap of the quantum well is 1.55 ${\mu}{\textrm}{m}$, For the calculation of the band structure and transition matrix element needed for the gain calculation, a block diagonalized 8$\times$8 second-order $\to{k}.\to{p}$ Hamiltonian was used to incorporate the conduction band nonparabolicity and the valence band mixing. The threshold current density shows discontinuity at 0.4% tensile strain where the first heavy-hole subband and the first light-hole subband cross and at 0.5% tensile strain where the second conduction subband begins to exist. The threshold current density at room temperature has a maximum around these 0.4-0.5% tensile strains, and as strain varies in either direction it decreases first and then increases a little after a local minimum. This calculated trend is consistent with the other reported experimental results. We discussed the results of this calculation in comparison with other theoretical or experimental papers on the effect of strain.

• Journal of the Korean Magnetics Society
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• v.18 no.4
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• pp.147-153
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• 2008

It has been well-known that the Fe/GaAs heterostructure has a small lattice mismatch of 1.4% between Fe and GaAs, and the Fe layer is grown epitaxially on the the GaAs substrate. There are rich physics are observed in the GaAs/Fe interface, and the spininjection is actively studied due to its potential applications for spintronics devices. We fabricated Fe wedge layer in the thickness range $0{\sim}3.4$ nm on the GaAs(100) surface with 5-nm thick Au capping layer. The magnetic anisotropy of the Fe/GaAs system was investigated by employing Brillouin light scattering(BLS) measurements in this study. The spin wave excitation of Fe layer was studied as the function of intensity and the in-plane angle of external magnetic field, and thickness of Fe layer. Also these various dependences were analyzed with analytic expression of spin wave surface mode in order to determine the magnetic anisotropies. It has been found that the GaAs/Fe/Au system has additional uniaxial magnetic anisotropy, while the bulk Fe has biaxial anisotropy. The uniaxial anisotropy shows increasing dependency respected to decreasing thickness of Fe layer while biaxial anisotropy is reduced with Fe film thickness. This result allows the analysis that the uniaxial anisotropy is originated from interface between GaAs surface and Fe layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.375-375
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• 2010

CdTe as an absorber material is widely used in thin film solar cells with the heterostructure due to its almost ideal band gap energy of 1.45 eV, high photovoltaic conversion efficiency, low cost and stable performance. The deposition methods and preparation conditions for the fabrication of CdTe are very important for the achievement of high solar cell conversion efficiency. There are some rearranged reports about the deposition methods available for the preparation of CdTe thin films such as close spaced sublimation (CSS), physical vapor deposition (PVD), vacuum evaporation, vapor transport deposition (VTD), closed space vapor transport, electrodeposition, screen printing, spray pyrolysis, metalorganic chemical vapor deposition (MOCVD), and RF sputtering. The RF sputtering method for the preparation of CdTe thin films has important advantages in that the thin films can be prepared at low growth temperatures with large-area deposition suitable for mass-production. The authors reported that the optical and electrical properties of CdTe thin film were closely connected by the thickness-uniformity of the film in the previous study [1], which means that the better optical absorbance and the higher carrier concentration could be obtained in the better condition of thickness-uniformity for CdTe thin film. The thickness-uniformity could be controlled and improved by the some process parameters such as vacuum level and RF power in the sputtering process of CdTe thin films. However, there is a limitation to improve the thickness-uniformity only in the preparation process [1]. So it is necessary to introduce the external or additional method for improving the thickness-uniformity of CdTe thin film because the cell size of thin film solar cell will be enlarged. Therefore, the authors firstly applied the chemical mechanical polishing (CMP) process to improving the thickness-uniformity of CdTe thin films with a G&P POLI-450 CMP polisher [2]. CMP process is the most important process in semiconductor manufacturing processes in order to planarize the surface of the wafer even over 300 mm and to form the copper interconnects with damascene process. Some important CMP characteristics for CdTe were obtained including removal rate (RR), WIWNU%, RMS roughness, and peak-to-valley roughness [2]. With these important results, the CMP process for CdTe thin films was performed to improve the thickness-uniformity of the sputtering-deposited CdTe thin film which had the worst two thickness-uniformities of them. Some optical properties including optical transmittance and absorbance of the CdTe thin films were measured by using a UV-Visible spectrophotometer (Varian Techtron, Cary500scan) in the range of 400 - 800 nm. After CMP process, the thickness-uniformities became better than that of the best condition in the previous sputtering process of CdTe thin films. Consequently, the optical properties were directly affected by the thickness-uniformity of CdTe thin film. The absorbance of CdTe thin films was improved although the thickness of CdTe thin film was not changed.