• Korean Journal of Materials Research
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• v.29 no.2
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• pp.106-115
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• 2019

Recently, metal cases are widely used in smart phones for their luxurious color and texture. However, when a metal case is used, electric shock may occur during charging. Chip capacitors of various values are used to prevent the electric shock. However, chip capacitors are vulnerable to electrostatic discharge(ESD) generated by the human body, which often causes insulation breakdown during use. This breakdown can be eliminated with a high-voltage chip varistor over 340V, but when the varistor voltage is high, the capacitance is limited to about 2pF. If a chip capacitor with a high dielectric constant and a chip varistor with a high voltage can be combined, it is possible to obtain a new device capable of coping with electric shock and ESD with various capacitive values. Usually, varistors and capacitors differ in composition, which causes different shrinkage during co-firing, and therefore camber, internal crack, delamination and separation may occur after sintering. In addition, varistor characteristics may not be realized due to the diffusion of unwanted elements into the varistor during firing. Various elements are added to control shrinkage. In addition, a buffer layer is inserted in the middle of the varistor-capacitor junction to prevent diffusion during firing, thereby developing a co-fired product with desirable characteristics.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.39.1-39.1
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• 2010

이종접합태양전지는 단결정 실리콘 기판 표면에 고품질 비정질 실리콘층을 적층함으로써 전기의 근원인 전하의 재결합 손실을 줄여 높은 개방전압을 얻을 수 있다는 특징이 있다. 초박형 태양전지는 기존 태양전지보다 뛰어난 광전변환 특성(Photovoltaic characteristic)을 가지고 두께가 얇아 제품 형상 시 자유도가 높아진다. 본 논문에서는 n-type Bare wafer($160{\sim}180{\mu}m$)를 이용하여 $50{\mu}m$의 웨이퍼를 제작하였다. a-Si:H(p)_a-Si:H(i)_c-Si(n)의 광흡수층 구조를 성막하여 cell을 제작하였다. 그 결과 Voc(Open Circuit Voltage)가 0.666, Jsc(Short-Circuit Current)가 34.77, FF(Fill Factor) 69.413, Efficency 16.07%를 달성했다.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.59.1-59.1
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• 2010

이종접합 구조의 태양전지는 에미터 및 후면전계층으로 비정질 실리콘이 이용되고 있다. 본연구에서는 HWCVD를 이용하여 중성층 비정질 실리콘을 증착(10nm), 패시베이션된 n형 결정질 실리콘을 기판으로 PECVD법으로 에미터 층은 p형 비정질 실리콘을 후면 전계층은 n+형 비정질 실리콘을 증착하여 a-Si:H(p)/c-Si(n)/a-Si:H(n+)의 구조로 에미터 및 후면전계층의 조건에 따른 이종접합 태양전지를 제작, 특성을 분석하였다. 증착시간에 따라 에미터와 후면전계층의 두께를 조절하고 도펀트 가스(B2H6,PH3)의 유량에 따라 도핑 농도를 조절하였다. 공정 변수마다 MCLT 및 Implied Voc를 측정하였고, 태양전지 제작 후 도핑 농도에 따른 충진율을 비교, 분석하였다.

• ETRI Journal
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• v.31 no.5
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• pp.601-603
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• 2009

This letter presents a high performance 2.4 GHz two-stage power amplifier (PA) operating in the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$ for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero-junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from $-30^{\circ}C$ to $+85^{\circ}C$.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.77-79
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• 2009

Amorphous/crystalline silicon heterojunction solar cells, TCO/a-Si:H (p)/c-Si(n)/a-Si:H(n)/Al, are investigated. The influence of various parameters for the front structures was studied. We used thin (10 nm) a-Si:H(p) layers of amorphous hydrogenated silicon are deposited on top of a thick ($500{\mu}m$) crystalline c-Si wafer. This work deals with the influence of the a-Si:H(p) doping concentration on the solar cell performance is studied.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.11a
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• pp.60-63
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• 1993

We have prepared n-CdS/p-InP hetero- junction solar cells by thermal evaporation. The efficiency under the optium conditions without the grid line contact was 7.3%, and the solar cell having glid line contact with SiO AR coating was the open circuit voltage of 0.71V, the short circuit voltage current density of 15mA/cm$^2$, the fill factor of 0.73, and the efficiency of 11.5%. As result of photoresponse in 400-1000nm wavelength the cutoff of n-CdS/p-InP solar at 500nm results from absorption by the CdS \"window\" and the cutoff at 930 nm result from absorption by the InP.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.04a
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• pp.217-221
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• 1997

We have investigated the ferroelectric properties of multi-layered SrBi$_2$Ta$_2$$O_{9}$Pb(Zr,Ti)O$_3$, SBT/PZT, thin film capacitors. Specimens were prepared onto Pt-coated Si wafer by sol-gel method. Ferroelectric properties of these finns could be obtained only for thin SBT layers below 50nm in thickness. The values of dielectric constant and remnant polarization depend mainly on the thickness of SBT layer, which arises from the paraelectric interface layer between SBT and PZT due to the thermal diffusion of Pb. The value of remnant poarization of PZT/SBT is greater than that of SBT, and the plarization fatigue behaviors of PZT/SBT/Pt capacitors are somewhat improved as compared with those of PZT/Pt.t.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.774-779
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• 1988

The homo and hetero-junction diodes were fabricated using BP-Si structure. After removal of Si substrates, schottky diodes were fabricated on the BP bulk. The electrical properties of the diode were examined through current-voltage characteristics curve. The schottky diode with Sb electrode has a cut-in voltage of 0.33V. This value is almost equal to that of the typical schottky diodes. The breakdown voltage of the schottky diode is 30V. When BP was used for photo cell as a window, the conversion efficiency improved from 6.5% to 8.3%, and optical transmissivity of BP invreased in short wavelength region.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.274-280
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• 2007

This paper demonstrates an efficiency improvement of the class E power amplifier (PA) by tuning-out the input capacitance ($C_{IN}$) of the power HBT with a shunt inductance. In order to obtain high output power, the PA needs the large emitter size of a transistor. The larger the emitter size, the higher the parasitic capacitance. The parasitic $C_{IN}$ affects the distortion of the voltage signal at the base node and changes the duty cycle to decrease the PA's efficiency. Adopting the L-C resonance, we obtain a remarkable efficiency improvement of as much as 7%. This PA exhibits output power of 29 dBm and collector efficiency of 71% at 1.9 GHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.484.1-484.1
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• 2014

Bulk hetero junction (BHJ) polymer solar cells (PSCs) are one of the most promising fields as alternative energy source. Especially, the development of new p-type conjugated polymer is one of the main issues to get core technology. In this study, a series of varied ratio of 3,6-carbazole in poly[9-(heptadecan-9-yl)-9H-carbazole-2,7-diyl-alt-(5,6-bis-(octyloxy)-4,7-di(thiophen-2-yl)benzo-[1,2,5]-thia-diazole)-5,5-diyl] were designed and synthesized. These polymers have good solubility and film formability than PCDTBT which is well known promising material. Investigation of the photovoltaic properties of these new polymers indicated that polymer with 2% of 3,6-carbazole provided higher PCE (3.8% to 4.9%) with enhanced JSC, FF, VOC. We found origin of this improvement using several methods, one of which is reduced bimolecular recombination in polymer.