• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.12
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• pp.1013-1019
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• 2014

Solid-liquid Phase Change Material(PCM) as a thermal control hardware for the electro-optical payload of low earth orbit satellite is numerically studied which can be substituted with Thermal Buffer Mass(TBM). The electro-optical module in LEO satellite is periodically work and high heat is dissipated during the imaging period, however, the design temperature range is very tight and sensitive. In order to handle this problem TBM is added and as a result the time constant of the module temperature increases. TBM is made of Al6010 and its mass directly affects the system design. To save the mass PCM is suggested in this study. The latent heat of melting or solidification is very high and small amount of PCM can play a role instead of TBM. The result shows that only 12% of TBM mass is enough to control the module temperature using PCM.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.9-16
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• 2005

This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

• Clean Technology
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• v.19 no.3
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• pp.243-248
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• 2013

Thermally conductive materials are widely used in various applications where effective heat dissipation is required. Graphene shows high potential for various uses owing to high electrical conductivity, good mechanical strength, and high thermal conductivity. Generally previous works used organic solvents are generally used for the dispersion of graphene in fabrication procedure. In order to achieve clean fabrication it is required to use water media. In this study, we fabricated graphene attached poly(methyl methacrylate) (PMMA) microsphere via microfluidic method. With the aid of surfactant, graphene was well dispersed in water which was used as continuous flow. Thermal conductivity was improved with the small amount of graphene addition and this indicate potential use of this system for thermally conductive composite material.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.2
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• pp.37-41
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• 2014

One of the important developments in next generation electronic devices is the technology for power delivery and heat dissipation. In this study, the Cu-to-Cu flip chip bonding process was evaluated using the square ABL power bumps and circular I/O bumps. The difference in bump height after Cu electroplating followed by CMP process was about $0.3{\sim}0.5{\mu}m$ and the bump height after Cu electroplating only was about $1.1{\sim}1.4{\mu}m$. Also, the height of ABL bumps was higher than I/O bumps. The degree of Cu bump planarization and Cu bump height uniformity within a die affected significantly on the misalignment and bonding quality of Cu-to-Cu flip chip bonding process. To utilize Cu-to-Cu flip chip bonding with ABL bumps, both bump planarization and within-die bump height control are required.

• Journal of Aerospace System Engineering
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• v.12 no.1
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• pp.57-67
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• 2018

The APD (Antenna Pointing Driver) is an electronic equipment tool that is used to drive the two-axis gimbal-type antenna for the image data transmission of CAS (Compact Advanced Satellite). In this study, a heat dissipation of EEE (Electrical, Electronic and Electromechanical) is reviewed, to identify the parts that directly affected its efficiency, lifetime as well as the reliability of the structure. This event eventually incurs a failure of the EEE part itself, or even the entire satellite system as noted in experiments in this case. To guarantee reliability of electronic equipment during the mission, the junction temperature of EEE parts is considered a significant and important design factor, and subsequently must be secured within the allowable range. Therefore, the notation of the thermal analysis considering the derating is indispensable, and a proper thermal mathematical model should be constructed for this case. In this study, the thermal design and thermal analysis are performed to confirm the temperature requirement of the APD. In addition, we noted that the validity of the thermal model, according to each of the identified modeling methods, was therefore compared through the thermal analysis utilized in this case.

• Composites Research
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• v.36 no.3
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• pp.162-166
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• 2023

Although composite materials are increasingly utilized in general high-strength structures, the demand of performance characteristics as the multifunctional materials has been increased especially in the area of complex electronic devices. While the heat dissipation properties of devices are typically required properties, control of thermal property of composite material especially in the vertical direction is one of the problems to be solved due to its lamination process. In this study, CFRP was manufactured using the Vacuum filtration method for three types of solvent and CFs. In the composite material manufacturing process, the effect of solvent was examined using three solvents where solvents are most frequently used for the dispersion of fibers. Morphology of fiber was observed through a microscope to confirm the arrangement of CFs in the vertical direction. The alignment of fiber was examined through the measurement of the thermal conductivity of the manufactured specimen. For the thermal conductivity measurement, the higher thermal conductivity was obtained with the lower aspect ratio of CF. For the thermal conductivity in the through-plane direction, 8.687 W/m·K, 10.322 W/m·K, and 13.005 W/m·K of thermal conductivity was measured in the DMF, NMP and Acetone, respectively.

• Korean Journal of Materials Research
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• v.20 no.11
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• pp.586-591
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• 2010

Solar cells have been more intensely studied as part of the effort to find alternatives to fossil fuels as power sources. The progression of the first two generations of solar cells has seen a sacrifice of higher efficiency for more economic use of materials. The use of a single junction makes both these types of cells lose power in two major ways: by the non-absorption of incident light of energy below the band gap; and by the dissipation by heat loss of light energy in excess of the band gap. Therefore, multi junction solar cells have been proposed as a solution to this problem. However, the $1^{st}$ and $2^{nd}$ generation solar cells have efficiency limits because a photon makes just one electron-hole pair. Fabrication of all-silicon tandem cells using an Si quantum dot superlattice structure (QD SLS) is one possible suggestion. In this study, an $SiO_x$ matrix system was investigated and analyzed for potential use as an all-silicon multi-junction solar cell. Si quantum dots with a super lattice structure (Si QD SLS) were prepared by alternating deposition of Si rich oxide (SRO; $SiO_x$ (x = 0.8, 1.12)) and $SiO_2$ layers using RF magnetron co-sputtering and subsequent annealing at temperatures between 800 and $1,100^{\circ}C$ under nitrogen ambient. Annealing temperatures and times affected the formation of Si QDs in the SRO film. Fourier transform infrared spectroscopy (FTIR) spectra and x-ray photoelectron spectroscopy (XPS) revealed that nanocrystalline Si QDs started to precipitate after annealing at $1,100^{\circ}C$ for one hour. Transmission electron microscopy (TEM) images clearly showed SRO/$SiO_2$ SLS and Si QDs formation in each 4, 6, and 8 nm SRO layer after annealing at $1,100^{\circ}C$ for two hours. The systematic investigation of precipitation behavior of Si QDs in $SiO_2$ matrices is presented.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.23 no.5
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• pp.213-217
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• 2013

The GaN layer was typical III-V nitride semiconductor and was grown on the sapphire substrate which cheap and convenient. However, sapphire substrate is non-conductivity, low thermal conductivity and has large lattice mismatch with the GaN layer. In this paper, the poly GaN epilayer was grown by HVPE on the metallic compound graphite substrate with good heat dissipation, high thermal and electrical conductivity. We tried to observe the growth mechanism of the GaN epilayer grown on the amorphous metallic compound graphite substrate. The HCl and $NH_3$ gas were flowed to grow the GaN epilayer. The temperature of source zone and growth zone in the HVPE system was set at $850^{\circ}C$ and $1090^{\circ}C$, respectively. The GaN epilayer grown on the metallic compound graphite substrate was observed by SEM, EDS, XRD measurement.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.95-104
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• 2004

This paper propose a motion estimator architecture to reduce the power consumption of the most-power-consuming motion estimation method when designing multimedia SoC with deep submicron technologies below 0.13${\mu}{\textrm}{m}$. The proposed architecture considers both dynamic and static power consumption so that it is suitable for large leakage process technologies, while conventional architectures consider only dynamic power consumption. Consequently, it is suitable for mobile information terminals such as mobile videophone where efficient power management is essential. It exploits full search method for simple hardware implementation. It also exploits early break-off method to reduce dynamic power consumption. To reduce static power consumption, megablock shutdown method considering power line noise is also employed. To evaluate the proposed architecture when applied multimedia SoC, system-level control flow and low-power control algorithm are developed and the power consumption was calculated based on thor From the simulation results, power consumption was reduced to about 60%. Considering the line width reduction and increased leakage current due to heat dissipation in chip core, the proposed architecture shows steady power reduction while it goes worse in conventional architectures.