• Journal of KIISE:Software and Applications
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• v.36 no.8
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• pp.607-615
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• 2009

There has recently been a trend that IT industry is united with traditional industries such as military, aviation, automobile, and medical industry. Therefore, embedded software which controls hardware of the system should guarantee the high reliability, availability, and maintainability. To guarantee these properties, there are many attempts to develop the embedded software based on COTS (Commercial Off The Shelf) hardware components. However, it can cause additional faults due to software/hardware interactions beside general software faults in this methodology. We called the faults, Linkage Fault. These faults have high severity that makes overall system shutdown although their occurrence frequency is extremely low. In this paper, we propose a new software reliability model which considers those linkage faults in embedded software development with COTS hardware components. We use the Bayesian Analysis and Markov Chain Monte-Cairo method to validate the model. In addition, we analyze real linkage fault data to support the results of the theoretical model.

• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.1
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• pp.19-24
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• 2008

To reduce time-to-market, more and more embedded system developers and system-on-chip designers rely on microprocessor-based design methodology. ARM processor has been a major player in this industry over the last 10 years. However, there are many restrictions on developing embedded software using ARM processor in the early design stage. For those who are not familiar with embedded software development environment or who cannot afford to have an expensive embedded hardware equipment, testing their software on a real ARM hardware platform is a challenging job. To overcome such a problem, we have designed VMA (Virtual ARM Machine), which offers easier testing and debugging environment to ARM based embedded system developers. Major benefits that can be achieved by utilizing a virtual ARM platform are (1) reducing development cost, (2) lowering the entrance barrier for embedded system novices, and (3) making it easier to test and debug embedded software designs. Unlike many other purely software-oriented ARM simulators which are independent of real hardware platforms, VMA is specifically targeted on SYS-Lab 5000 ARM hardware platform, (designed by Libertron, Inc.), which means that VMA imitates behaviors of embedded software as if the software is running on the target embedded hardware as closely as possible. This paper will describe how VMA is designed and how VMA can be used to reduce design time and cost.

• Nuclear Engineering and Technology
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• v.29 no.6
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• pp.433-443
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• 1997

In this work, an analytic approach to the dependability of software in the operational phase is suggested with special attention to the hardware fault effects on the software behavior : The hardware faults considered are memory faults and the dependability measure in question is the reliability. The model is based on the simple reliability theory and the graph theory which represents the software with graph composed of nodes and arcs. Through proper transformation, the graph can be reduced to a simple two-node graph and the software reliability is derived from this graph. Using this model, we predict the reliability of an application software in the digital system (ILS) in the nuclear power plant and show the sensitivity of the software reliability to the major physical parameters which affect the software failure in the normal operation phase. We also found that the effects of the hardware faults on the software failure should be considered for predicting the software dependability accurately in operation phase, especially for the software which is executed frequently. This modeling method is particularly attractive for the medium size programs such as the microprocessor-based nuclear safety logic program.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.2
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• pp.37-46
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• 1996

This paper proposes a cost-effective solution to the synonym problem of virtual caches. In the proposed solution, a minimal hardware addition guarantees the correctness whereas the software counterpart helps improve the performance. The key to this proposed solution is an addition of a small physically-indexed cache called U-cache. The U-cache maintains the reverse translation information of the cache blocks that belong to unaligned virtual pages only, where aligned measns that the lower bits of the virtual page number match those of the corresponding physical page number. The page alignment is a simple software optimization to improve the performance of the U-cche hardware. With the combination of both hardware and software, the proposed solution reduces the hardware costs and minimizes software modification and performance degradation. Performance evaluation base on ATUM traces shows that a U-cache, with only a few entries, performs almost as well as fully-configured hardware-based solution when more than 95% of the pages are aligned.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9A
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• pp.1368-1376
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• 2000

This paper describes the codesign method for IS-95 based CDMA(Code Division Multiple Access). By codesign we mean to design hardware and software simultaneously. Codesign lead to reduction in design time, cost and power consumption. When we partition a system into hardware and software, some modules with longer processing time and larger power consumption are implemented using hardware and the remaining part is implemented using software. In proposed design, we design the synchronous accumulator of CDMA searcher in hardware and the other part in software, The hardware part is designed using VHDL, while software part is designed using GC(Generic C). We simulated and verified the system using COSSAP in SYNOPSYSTM. Experimentation showed the maximum 48.5% speed reduction compared with the design using software only.

• Journal of the Korea Society of Computer and Information
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• v.28 no.1
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• pp.71-78
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• 2023

In this paper, we analyze the structure of TV video software, one of the warship combat management system software, and propose a standard architecture that minimizes software modification due to the discontinuation replacement of warship hardware. The class structure was newly designed to minimize the class modified when replacing the warship hardware by separating the variable elements and common elements of TV video software through FORM(Feature-Oriented Reuse Method), the common part that communicates with the warship combat management system and displays the TV screen and the variable part that communicates between the operator and the TV camera. In addition, the Strategy design pattern is applied to efficiently add and modify classes that directly use hardware-dependent APIs when replacing hardware discontinuation, and to make both discontinued and replacements available software. Finally, the reliability testing time and functional testing time of the existing TV video software and the proposed software were measured and compared, and finally, it was confirmed that the hardware discontinuation replacement cost was reduced.

• Journal of KIISE:Software and Applications
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• v.30 no.12
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• pp.1149-1157
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• 2003

As an Embedded system combining hardware and software gets more complicated, the importance of the embedded software test increases. Especially, it is mandatory to test the embedded software in the system which has high safety level. In embedded system, it is necessary to develop a test technique to detect faults in interaction between hardware and software. In this paper, we propose a test data selection technique using a fault injection technique for the faults in interaction between hardware and software in embedded system and we apply our technique to the Digital Plant Protection System and analyze effectiveness of the proposed technique through experiments.

• Publications of The Korean Astronomical Society
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• v.23 no.2
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• pp.73-90
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• 2008

A software simulator is developed for verifying the VLBI Correlation Subsystem (VCS) trial product hardware. This software simulator includes the delay tracking, fringe rotation, bit-jump, FFT analysis, re-quantization, and auto/cross-correlation functions so as to confirm the function of the VCS trial product hardware. To verify the effectiveness of the developed software simulator, we carried out experiments using the simulation data which is a mixed signal with white noise and tone signal generated by software. We confirmed that the performance of this software simulator is similar as that of the hardware system. In case of spectral analysis and re-quantization experiment, a serious problem of the VCS hardware, which is not enough for expressing the data stream of FFT results specified in VCS hardware specification, was found by this software simulator. Through the experiments, the performance of software simulator was verified to be efficient. In future, we will improve and modify the function of software simulator to be used as a software correlator of Korea-Japan Joint VLBI Correlator (KJJVC).

• Proceedings of the Korea Society for Simulation Conference
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• 1992.09a
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• pp.161-167
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• 1992

The spcaker will briefly summarized the current state of the art in commericial simulation tools as limited by soft ware and hardware technology. He will then discuss how recent and near-future advances in software and hardware tenilogy can be applied to the benefit of simulationists. Specifically, the following topics will be ciscussed : Simulation Languages vs Simulations ; Computer hardware platforms ; Performance liminting factors ; Performance assisting techniques ; Software architectures ; Human factors and model interaction.

• Electronics and Telecommunications Trends
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• v.36 no.6
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• pp.67-77
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• 2021

Since Richard Feynman presented the concept of quantum computers, quantum computing have been identified today overcoming the limits of supercomputing in various applications. Quantum hardware has steadily developed into 50 to hundreds of qubits of various quantum hardware technologies based on superconductors, semiconductors, and trapped ions over 40 years. However, it is possible to use a NISQ (Noisy Intermediate Scale Quantum) level quantum device that currently has hardware constraints. In addition, the software environment in which quantum algorithms for problem solving in various applications can be executed is pursuing research with quantum computing software such as programming language, compiler, control, testing and verification. The development of quantum software is essential amid intensifying technological competition for the commercialization of quantum computers. Therefore, this paper introduces the trends of the latest technology, focusing on quantum computing software platforms, and examines important software component technologies.