• 대한임베디드공학회논문지
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• 제7권2호
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• pp.79-84
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• 2012

Efficient arithmetic design is essential to implement error correcting codes and cryptographic applications over finite fields. This article presents an efficient $AB^2$ multiplier in GF($2^m$) using a polynomial representation. The proposed multiplier produces the result in m clock cycles with a propagation delay of two AND gates and two XOR gates using O($2^m$) area-time complexity. The proposed multiplier is highly modular, and consists of regular blocks of AND and XOR logic gates. Especially, exponentiation, inversion, and division are more efficiently implemented by applying $AB^2$ multiplication repeatedly rather than AB multiplication. As compared to related works, the proposed multiplier has lower area-time complexity, computational delay, and execution time and is well suited to VLSI implementation.

• 한국환경과학회지
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• 제12권12호
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• pp.1277-1284
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• 2003

The photocatalytic oxidation of Rhodamine B (RhB) was studied using immobilized TiO$_2$ and fluidized bed reactor. Immobilized TiO$_2$ onto GF/C was employed as the photocatalyst and a 30 W germicidal lamp was used as the light source and the reactor volume was 4.8 L. The effects of parameters such as the amounts of photocatalyst, initial concentration, initial pH, air flow rate and anion additives (NO$_3$$\^$-/, SO$_4$$\^$2-/, Cl$\^$-/, CO$_3$$\^$2-/) competing for reaction. The results showed that the optimum dosage of the immobilized TiO$_2$ was 40.0 g/L. Initial removal rate of immobilized TiO$_2$ was expressed Langmuir - Hinshelwood equation.

• 디지털산업정보학회논문지
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• 제16권2호
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• pp.1-9
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• 2020

Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

• 수산해양기술연구
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• 제40권2호
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• pp.161-165
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• 2004

The main goal of this work is to study the effect of glass fiber volume fraction on the result of tensile test with respect to glass fiber/polypropylene(GF/PP) composites. The tensile test and failure mechanisms of GF/PP composites were investigated in the fiber volume fraction range from 10% to 30%. The tensile strength and the fracture strength increased with the increasing of the fiber volume fraction in the tested range. Fiber pull-out and debonding of this composites increased with the fiber volume fraction in thc tested range. The major failure mechanisms were classified into the debonding, the fiber pull out, the delamination and the matrix deformation.

• 전자공학회논문지B
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• 제31B권3호
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• pp.60-68
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• 1994

In this paper, the multiplicative algorithm of two polynomials over finite field GF(($p^{m}$) is presented. Using the presented algorithm, the multiple-valued multiplier of the serial input-output modular structure by CCD is constructed. This multiple-valued multiplier on CCD is consisted of three operation units: the multiplicative operation unit, the modular operation unit, and the primitive irreducible polynomial operation unit. The multiplicative operation unit and the primitive irreducible operation unit are composed of the overflow gate, the inhibit gate and mod(p) adder on CCD. The modular operation unit is constructed by two mod(p) adders which are composed of the addition gate, overflow gate and the inhibit gate on CCD. The multiple-valued multiplier on CCD presented here, is simple and regular for wire routing and possesses the property of modularity. Also. it is expansible for the multiplication of two elements on finite field increasing the degree mand suitable for VLSI implementation.

• 아동학회지
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• 제30권1호
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• pp.1-10
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• 2009

This study examined academic achievement of children in female marriage immigrant families (MIF) and children in general families (GF). Subjects were 78 MIF and 82 GF children recruited from Chungcheong and Jeolla provinces. Academic achievement was determined by questionnaires completed by their teachers; intelligence was measured with standardized intelligence tests. Data were analyzed by two-way ANOVA and ANCOVA. Results showed that (1) academic achievement of MIF children was lower than that of GF children in overall academic achievement and individual subject achievement. (2) The difference in academic achievement between the two groups remained after controlling for intelligence. Results of this study illustrate the urgent need for supportive policy to enhance the academic achievement of MIF children.

• 한국정밀공학회지
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• 제20권1호
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• pp.70-78
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• 2003

The purpose of this study was to present the method to choose the optimization machining condition for the wire electric discharge machine. This was completed by examining the ever-changing quality of the material and by improving the function of the wire electric discharge machine. Precision metal mold products and the unmanned wire electric discharge machining system were used and then applied in industrial fields. This experiment uses the wire electric discharge machine with brass wire electrode of 0.25mm. In this experiment, we changed no-node voltage to 7 and 9, pulse-on-time to 6$mutextrm{s}$, 8$mutextrm{s}$ and 10$mutextrm{s}$, pulse-off-time to 8$mutextrm{s}$, 10$mutextrm{s}$ and 13$mutextrm{s}$, and experimented on wire tension at room temperature by 1000gf, 1200gf, and 1400gf, respectively.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2004년도 봄 학술발표논문집 Vol.31 No.1 (A)
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• pp.382-384
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• 2004

최근 인터넷의 발달과 함께 인터넷 상에서의 데이터 보안에 대한 요구가 매우 증가되고 있다. 그래서 공개키 또는 비밀키 알고리즘을 사용하여 데이터 보안을 해결하고 있다. 대부분의 공개키 알고리즘은 모듈러 연산들을 기반으로 살고 있으며 이 중 복잡도가 가장 높은 모듈러 멱승 연산은 모듈러 곱셈 연산을 반복 수행하여 계산된다. 그래서 모듈러 곱셈연산을 효율적으로 계산하기 위한 많은 방법들이 제안되어 왔으며 하드웨어 구현 시 속도와 효율성 문제로 몽고메리 곱셈기에 대한 연구가 주목을 받아 왔다. 현재 몽고메리 곱셈 알고리즘을 이용한 곱셈기는 대부분이 성능과 면적만을 고려한 구조로 보안성 향상을 위해 입력 데이터의 비트수 증가 시 곱셈기의 구조 변경이 요구된다. 따라서 본 논문에서는 비트수 길이가 변하더라도 곱셈기 구조는 변함이 없는 GF(p)상에서의 Scalable한 몽고메리 곱셈기 구조를 제안한다. Sealable한 곱셈기의 구조는 FPGA와 같이 메모리를 포함하는 하드웨어 플랫폼에 적합하다. 제안된 구조는 Xilinx FPGA를 이용하여 하드웨어로 구현하며 ModelSim Tool을 통해 기능 및 타이밍 시뮬레이션을 수행한다.

• 수산해양기술연구
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• 제48권3호
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• pp.277-283
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• 2012

The characteristics of abrasive wear on sliding speed of glass fiber reinforcement (GF/PUR) composites were investigated at ambient temperature by pin-on-disc friction test. The cumulative wear volume, friction coefficient and surface roughness of these materials on sliding speed were determined experimentally. The major failure mechanisms were lapping layers, deformation of resin, ploughing, delamination, and cracking by scanning electric microscopy (SEM) photograph of the tested surface. As increasing the sliding speed the GF/PUR composites indicated higher friction coefficient. The surface roughness of the GF/PUR composites was increased as the sliding speed was higher in wear test.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2007년도 한국컴퓨터종합학술대회논문집 Vol.34 No.1 (D)
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• pp.54-57
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• 2007

최근 멀티미디어 데이터 전송이 증가함에 따라 정보보호의 중요성이 대두되고 있으며, 기존의 데이터 전송시 암호화 뿐만 아니라, 안정적인 디지털 암호화 방법론과 컬러 영상 전송시 발생할 수 있는 원본 데이터의 중요성이 요구되고 있다. 따라서 본 논문에서는 정보 손실을 줄이기 위하여 주변 픽셀간의 변동폭이 심한 픽셀 단위의 암호화 방법이 아닌 컬러 영상 데이터 전송을 위해 영상 데이터의 각 프레임에 대한 암호화 기법을 제안한다. 또한 보다 안정된 암호화 방법으로 각 프레임에 대한 변형된 유한체 $GF(2^m)$상의 4bit 블록화를 통한 컬러 영상의 암호화 방법을 제안한다.