• Title/Summary/Keyword: gate drive

Search Result 195, Processing Time 0.027 seconds

Design of Compact and Efficient Interleaved Active Clamp ZVS Forward Converter for Modular Power Processor Distributed Power System

  • Moon, Gun-Woo
    • Journal of Electrical Engineering and information Science
    • /
    • v.3 no.3
    • /
    • pp.366-372
    • /
    • 1998
  • A high efficiency interleaved active clamp forward converter with self driven synchronous rectifiers for a modular power processor is presented. To simplify the gate drive circuits, N-P MOSFETs coupled active clamp method is used. An efficiency about 90% for the load range of 50-100% is achieved. The details of design for the power stage and current mode control circuit are provided, and also some experimental results are given.

  • PDF

Novel Driving Scheme for Secondary-side Synchronous Rectifiers of LLC Resonant Converter (LLC 공진형 컨버터의 동기정류기의 새로운 구동 방법)

  • Kim, Myungbok;Kwak, Bong-Woo
    • Proceedings of the KIPE Conference
    • /
    • 2013.07a
    • /
    • pp.413-414
    • /
    • 2013
  • An LLC resonant converter is widely used due to many advantages over others. However, it is still not used in high current applications because it is difficult to drive the synchronous rectifiers. In this paper, a novel gate driving sheme for secondary-side synchronous rectifiers is introduced and its simulation results are also presented

  • PDF

A new active-gate-drive (AGD) technique for voltage balancing in series-connected switching devices (직렬 연결된 스위칭 소자의 전압 평형을 위한 새로운 능동 게이트 구동 기법)

  • Son, Myeongsu;Cho, Younghoon
    • Proceedings of the KIPE Conference
    • /
    • 2019.11a
    • /
    • pp.87-89
    • /
    • 2019
  • 본 논문에서는 직렬 연결된 스위칭 소자에서 발생할 수 있는 전압 불평형의 원인을 분석하고 이를 제거할 수 있는 능동 게이트 구동 기법을 제안한다. 제안하는 방법은 스위치의 턴오프 경로에 트랜지스터를 추가하여 전압 불평형 정도에 따라 각 소자의 스위칭 속도를 조절함으로써 전압 불평형을 제거한다. 제안하는 방법의 확인을 위하여 SiC MOSFET을 이용한 전력변환회로를 대상으로 모의실험을 실시하였고, 제안하는 방법이 전압 불평형의 제거에 효과적임을 검증하였다.

  • PDF

DEVELOPMENT OF AC SERVO MOTOR CONTROLLER FOR INDUSTRIAL ROBOT AND CNC MACHINE SYSTEM (산업용 ROBOT와 공작기계를 위한 AC SERVO MOTOR 제어기 개발)

  • Lim, Sang-Gwon;Lee, Jin-Won;Moon, Yong-Ky;Jeon, Dong-Lyeol;Jin, Sang-Hyun;Oh, In-Hwan;Kim, Dong-Il;Kim, Sung-Kwun
    • Proceedings of the KIEE Conference
    • /
    • 1992.07b
    • /
    • pp.1211-1214
    • /
    • 1992
  • AC servo motor drives, Fara DS series, proposed in this paper can be effectively used in robots, CNC machine tools, and FA system with AC servo motors as actuators. The inverter of the AC servo drive consists of IGBT (Insulated Gate Bipolar Transistor) which have high switching frequency. Noises and vibrations generated in variable speed control of AC servo motors can be greatly reduced due to their high switching frequencies. In the developed servo drive, maximum torque is always generated in the whole speed range by compensating phase shift, which results from the nonlinearies of the AC servo motor during abrupt acceleration and deceleration. Abundant protection functions are provided to prevent abnormal state of the servo motor, and furthermore diverse user options are considered provided for the effective application. The proposed AC servo motor drive is designed to minimize velocity variation with respect to external load, supply voltage, environmental temperature, and humidity, so can be widely used in the fields of factory automation including robots and CNC msachine tools.

  • PDF

Simulation of Junction Field Effect Transistor using SiGe-Si-SiGe Channel Structure (SiGe-Si-SiGe 채널구조를 이용한 JFET 시뮬레이션)

  • Park, B.G.;Yang, H.Y.;Kim, T.S.;Shim, K.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.11a
    • /
    • pp.94-94
    • /
    • 2008
  • We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

  • PDF

Dickson Charge Pump with Gate Drive Enhancement and Area Saving

  • Lin, Hesheng;Chan, Wing Chun;Lee, Wai Kwong;Chen, Zhirong;Zhang, Min
    • Journal of Power Electronics
    • /
    • v.16 no.3
    • /
    • pp.1209-1217
    • /
    • 2016
  • This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

A New High-Efficiency CMOS Darlington-Pair Type Bridge Rectifier for Driving RFID Tag Chips (RFID 태그 칩 구동을 위한 새로운 고효율 CMOS 달링턴쌍형 브리지 정류기)

  • Park, Kwang-Min
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.13 no.4
    • /
    • pp.1789-1796
    • /
    • 2012
  • In this paper, a new high-efficiency CMOS bridge rectifier for driving RFID tag chips is designed and analyzed. The input stage of the proposed rectifier is designed as a cascade structure connected with two NMOSs for reducing the gate capacitance by circuitry method, which is the main path of the leakage current that is increased when the operating frequency is increased. This gate capacitance reduction technique using the cascade input stage for reducing the gate leakage current is presented theoretically. The output characteristics of the proposed rectifier are derived analytically using its high frequency small-signal equivalent circuit. For the general load resistance of $50K{\Omega}$, the proposed rectifier shows better power conversion efficiencies of 28.9% for 915MHz UHF (for ISO 18000 -6) and 15.3% for 2.45GHz microwave (for ISO 18000-4) than those of 26.3% and 26.8% for 915MHz, and 13.2% and 12.6% for 2.45GHz of compared other two existing rectifiers. Therefore, the proposed rectifier may be used as a general purpose rectifier to drive tag chips for various RFID systems.

A Study on the Fabrication of 1W Power Amplifier for IMT2000 Repeater Using Nonlinear Analysis (비선형 해석법을 이용한 IMT2000 중계기용 1W 전력증폭기 제작 연구)

  • 전광일
    • Journal of the Institute of Electronics Engineers of Korea TE
    • /
    • v.37 no.2
    • /
    • pp.83-90
    • /
    • 2000
  • A simple low-cost and small size 1.88-198 GHz Band RF power amplifier module is developed for IMT2000 repeater. The power amplifier consists of two stage amplifiers that the first stage amplifier is drive amplifier using discrete type P-HEMT (ATF-34143, 800 micron gate width, Agilent Technologies) and the second is power amplifier with 300Bm 1dB gain compression point using GaAs FET(EFA240D-SOT89, 2400 micron gate width, Excelics Semiconductor). this power amplifier module feature a 29.5dBm 1dB gain compression point, 29.5dB gain, 42dBm 3rd order intercept point(OIP3) and -10dB/-l2dB input/output return loss over the 1880-1980 MHz. This PA module is fully integrated using MIC technology into a small size and design by full nonlinear design technologies. The dimensions of this PA module are 42(L) $\times$ 34(W) mm.

  • PDF

Microprocessor Based Permanent Magnet Synchronous Motor Drive (마이크로 프로세서에 의한 영구자석동기 전동기의 구동)

  • Yoon, Byung-Do
    • The Transactions of the Korean Institute of Electrical Engineers
    • /
    • v.35 no.12
    • /
    • pp.541-554
    • /
    • 1986
  • This paper presents the results of driving performance analysis of permanent magnet synchronous motor using a microprocessor based control system. The system consists of three phase power transistor inverters, three phase controlled rectifier, three central processing units, and sensors. The three CPUs are, respectively, used to generate PWM control signals for the inverter generating three phase sine wave, to generate the gate control signals for firing the converter, and to supervise other two CPUs. The supervisor is used to compute PI control algtorithm to three phase reference sine wave for the inverter. It is also used to maintain a constant voltage frequency ratio for the converter operating as a constant torque controller. The inverter CPU retrieves precomputed PWM patterns from look up tables because of computation speed limitations found in almost available microprocessors. The converter CPU also retrieves precomputed gate control patterns from another look-up tables. For protecting the control ststem from any damage by extraordinary over currents, the supervisor receives the data from current sensor, CT, and break down the CB to isolate the circuits from source. A resolver has a good performance characteristics of overall speed range, especially on low speed range. Therefor the speed control accuracy is impoved. The microprocessor based PM synchronous motor control system, thus, has many advantages such as constant torque characteristics, improvement of wave, limitation on extraordinary over currents, improvement of speed control accuracy, and fast response speed control using multi-CPU and look-up tables.

  • PDF

Improved Performance of SVPWM Inverter Based on Novel Dead Time and Voltage Drop Compensation (새로운 데드타임 및 전압강하의 보상을 이용한 SVPWM 인버터의 성능개선)

  • Lee, Dong-Hui;Gwon, Yeong-An
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.49 no.9
    • /
    • pp.618-625
    • /
    • 2000
  • Recently PWM inverters are widely utilized for many industrial applications e.g. high performance motor drive and PWM techniques are newly developed for an accurate output voltage. Among them space voltage vector PWM(SVPWM) inverter has high voltage ratio and low harmonics compared to the conventional sinusoidal PWM inverter. However output voltage of PWM inverter is distorted and has error duet o the conducting voltage drop of switching devices and the dead time that is inevitable to prevent the shoot-through phenomenon. This paper investigates 3-phase SVPWM inverter which has a new compensation method against dead time and voltage drop. Proposed algorithm calculates gate pulse periods which directly compensates the dead time and nonlinear voltage drop without modification of reference voltages. Direct compensation of gate pulse periods produces exact output voltage and does not need additional circuits. The propose algorithm is verified through the simulation and experiments.

  • PDF