• 예술인문사회 융합 멀티미디어 논문지
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• 제8권11호
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• pp.523-530
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• 2018

전력 변환 시스템의 고효율, 고전력 밀도를 위한 많은 연구가 활발하게 되어 왔다. 스위칭 주파수를 높임으로써 컨버터의 소형화 및 경량화를 꾀할 수 있으나 스위칭 주파수를 높이게 되면 스위칭 손실이 증가하게 된다. 따라서 스위칭 손실을 저감하기 위한 기법이 적용되어야 한다. 본 연구에서는 이 중 부가적인 회로 없이 변압기의 누설 인덕턴스와 스위치의 출력 커패시터를 이용하여 영전압 스위칭이 가능한 영전압 스위칭(Zero-Voltage Switching) 위상천이(Phase Shift) 풀 브리지 컨버터를 이용하여, 영전압 위상천이 풀 브리지 컨버터의 동작원리를 해석하고 2kW의 출력을 갖는 영전압 스위칭 풀 브리지 컨버터를 설계한다. 각 모드별 동작을 스위치 도통 상태와 전압 전류 파형으로 분석하였다. 분석 결과, 영전압 스위칭이 도통 스위치들의 각 쌍 사이의 위상 변화에 의해 최대 효율을 달성하는 것을 확인하였다. 제안된 영전압 위상천이 풀 브리지 컨버터 설계를 검증하기 위해 컴퓨터 시뮬레이션 툴인 PowerSIM사의 PSIM을 이용하여 설계된 2kW 출력 전력을 갖는 영전압 스위칭 위상천이 풀 브리지 컨버터의 성능을 확인하였고, 실험을 통해 연구의 타당성을 입증하였다.

• 조명전기설비학회논문지
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• 제27권2호
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• pp.69-76
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• 2013

In this paper, electronic ballast using resonant inverter for HID lamp is designed and implemented. The proposed electronic ballast is used the soft switching technology ZVS(Zero Voltage Switching) to reduce turn-on and turn-off loss. The ignition of proposed electronic ballast is achieved by controlling a full bridge inverter which is consisted of LC filter for resonance. After ignition the ballast operates as a low frequency square wave inverter by controlling a full bridge inverter as a buck converter. After ignition at resonant frequency of $f_o$=160kHz, the switching frequency of a buck converter is consisted of 50kHz of high frequency and 170Hz of low frequency. This is for attenuating high frequency harmonics and avoiding acoustic resonance. The experimental results show that electronic ballast using resonant inverter is operated stably.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2127-2129
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• 1998

In this paper, discharging part of high voltage pulse power supply of E-beam generating device is simulated and experimented. It is composed of high voltage part and high voltage pulse part. High voltage part is AC 380, DC/DC converter, high voltage high frequency transformer. High voltage pulse part is double pulse forming network and Thyratron. In the result, computer simulation analysis is same to experimental result and high voltage pulse is obtained 10kV, 4A, 10uS.

• 한국정보통신학회논문지
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• 제10권4호
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• pp.652-658
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• 2006

본 논문은 승압형 컨버터, 강압형 컨버터 및 저주파 인버터를 이용한 고휘도 Short-Arc 램프용 전자식 안정기의 설계 및 제작에 관하여 기술하였다. 제안한 안정기는 130 [Hz]의 구형 저주파를 램프에 인가함으로써 고압 방전 램프에서 발생할 수 있는 음향공명현상을 제거하였으며, 25 [kHz]의 고주파 전압을 중첩시켜 아크튜브의 전극에서 발생할 수 있는 열적 불균형을 해소하였다. 또한 전압 전류의 합을 이용한 정전력 제어를 수행하여, 주위 환경 및 램프의 노화에 따른 램프 전압의 변화에 대하여 안정한 점등상태를 유지하였다. 실험 결과로부터, 제작한 전자식 안정기의 램프 전압, 전류 및 전력은 각각 123.8 [V], 8.1 [A] 1,002 [W]로 측정되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.535-538
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• 1994

In this paper, an isolated ZVS-PWM boost converter is proposed for single stage line conversion. For power factor correction, we used the half bridge topology at the primary side of isolation transformer permitting switching devices to operate under ZVS by using circuit parastics and operating at a fixed duty ratio near 50%. Thus the relatively continuous input current distortion and small size input filter are also achievable. The ZVS-PWM boost operation of the proposed converter can be achieved by using the boost inductor $L_f$, main switch $Q_3$, and simple auxiliary circuit at the secondary side of isolation transformer. The secondary side circuit differ from a conventional PWM boost converter by introduction a simple auxiliary circuit. The auxiliary circuit is actived only during a short switching transition time to create the ZVS condition for the main switch as that of the ZVT-PWM boost converter. With a single stage, it is possible to achieve a sinusoidal line current at unity power factor as well as the isolated 48V DC output. Comparing to the two stage schemes, overall effiency of the proposed converter is highly improved due to the effective ZVS of all devices as well as single stage power conversion. Thus, it can be operated at high switching frequency allowing use of small size input filter. Minimum voltage and current stress make it high power application possible.

• 전자공학회논문지S
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• 제34S권2호
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• pp.112-120
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• 1997

The clamp mode (CM) forward zero voltage switching multi resonant converter (ZVS-MPC) with self-driven synchronous rectifier is studied. The loss at the synchronous rectification stage of the converter is analyzed using MOSFET piecewise linear model and is compared with the loss at the conventional schottky diode rectification stage of th econverter. From the results of the analysis, it is known that the use fo MOSFETs as a synchronous rectifier reduces the loss at the rectification stage overthe whole load range comparing the use of schottky diodes as a conventional rectifier in the converter. In order to verify the validit of the analysis, we have built a 33W(3.3V/10A) CM forward ZVS-MRC with self-driven synchronous rectifier, in which switching frequency is 1MHz, and tested. FRom the experimental results, it is known that the synchronous rectification achieved about 1W improvement in the loss at the rectification stage and about 3% in the efficiency at the converter as compared with the conventional schottky diode rectification.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.227-230
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• 2001

This paper deals with a bidirectional ac-dc converter used in ups system application. We propose a Voltage-Source-Charge-Pump-Power-Factor-Correction(VS-CPPFC) ac-dc converters. First of all, we propose a charge pump power-factor-correction converter. Secondly, we derive and analyse a unity power factor condition. The proposed topology is based on a half-bridge for the primary and a current-fed push pull for the secondary side of a high frequency isolation transformer. The advantage of bidirectional flow of power achieved by using the same power components is that the circuit is simple and efficient. And the galvanically isolated topology is specially attractive in battery charge/discharge circuits in ups system. We design equivalent model for the steady-state circuit and analyse operation waveforms for each mode. We show that the proposed model can be applied to ups system by simulation processes.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 추계학술대회 논문집
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• pp.121-124
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• 2002

The conventional three-level high frequency phase-shifted dc/dc converter has a disadvantage that a circulating current flows through transformer and switching devices during the freewheeling interval. Due In this circulating current and RMS current stress, conduction losses of transformer and switching devices increases. To alleviate these problems, we propose an improved three-level Zero Voltage and Zero Current Switching (ZVZCS) dc/dc converter using a tapped inductor, a snubber capacitor and two snubber diodes attached at the secondary side of transformer The proposed ZVZCS converter is verified on a 7kW, 30kHz experimental prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.365-366
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• 2017

LLC resonant DC-DC converter is widely used in many kinds of applications such as battery energy storage systems, wireless power transfer and high voltage power supply. It is because of characteristics like high efficiency, power density, isolation, wide power level and stability enhancement at high switching frequency. Small signal modeling helps to design controller of the converter by approximating the behavior of nonlinear system with linear state equations. This paper presents comparison between small signal modeling analysis and experimental results of LLC resonant converter.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.305-308
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• 2002

An 1.8V 6bit IGSPS ADC for high speed data acquisition is discussed in this paper. This ADC is based on a flash ADC architecture because the flash ADC is the only practical architecture at conversion rates of IGSPS and beyond. A straightforward 6bit full flash A/D converter consists of two resistive ladders with 63 laps, 63 comparators and digital blocks. One important source of errors in flash A/D converter is caused by the capacitive feedthrough of the high frequency input signal to the resistive reference-lauder. Consequently. the voltage at each tap of the ladder network can change its nominal DC value. This means large transistors have a large parasitic capacitance. Therefore, a dual resistive ladder with capacitor is employed to fix the DC value. Each resistive ladder generates 32 clean reference voltages which alternates with each other. And a two-stage amplifier is also used to reduce the effect of the capacitive feedthrough by minimizing the size of MOS connected to reference voltage. The proposed ADC is based on 0.18${\mu}{\textrm}{m}$ 1-poly 6-metal n-well CMOS technology, and it consumes 307㎽ at 1.8V power supply.