• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.9
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• pp.2081-2086
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• 2015

The temperature sensor using ring oscillator is designed by 0.18㎛ CMOS process and the supply voltage is 1.5volts. The temperature sensor is designed by using temperature-independent and temperature-dependent ring oscillators and the output frequency of temperature-independent ring oscillator is constant with temperature and the output frequency of temperature-dependent ring oscillator decreases with increasing temperature. To convert the temperature to a digital value the output signal of temperature-independent ring oscillator is used for the clock signal and the output signal of temperature-dependent ring oscillator is used for the enable signal of counter. From HSPICE simulation results, the temperature error is less than form -0.7℃ to 1.0℃ when the operating temperature is varied from -20℃ to 70℃.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.16-23
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• 2010

This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.

• Journal of Power Electronics
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• v.7 no.3
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• pp.222-232
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• 2007

This paper presents the application of a single phase AC-to-DC converter using a three-phase series parallel (SPRC) resonant converter to variable speed dc-drive. The improved power quality converter gives the input power factor unity over a wide speed range, reduces the total harmonic distortion (THD) of ac input supply current, and makes very low ripples in the armature current and voltage waveform. This soft-switching converter not only possesses the advantages of achieving high switching frequencies with practically zero switching losses but also provides full ranges of voltage conversion and load variation. The proposed drive system is the most appropriate solution to preserve the present separately excited de motors in industry compared with the use of variable frequency ac drive technology. The simulation and experimental results are presented for variable load torque conditions. The variable frequency control scheme is implemented using a DSP- TMS320LF2402. This control reduces the switching losses and current ripples, eliminates the EMI and improves the efficiency of the drive system. Experimental results confirm the consistency of the proposed approach.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.170-172
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• 2005

The DSD(Direct Stream Digital) encoder, which is a standard for SACD(Super Audio Compact Disc) proposed by Sony and philips, use 1 bit representation with a sampling frequency of 2.8224 MHz (64 $\times$ 44.1 kHz). For multi-rate PCM (Pulse Code Modulation) input like as 48/96/192 kHz, a external sample-rate converter is necessary to the DSD encoder. This paper has been proposed a digital filter structure composed of sample-rate converter and interpolation filter for the DSD encoder with multi-rate (48/96/192 kHz) PCM input. without a external sample-rate converter.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.358-360
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• 2005

The DSD(Direct Stream Digital) encoder, which is a standard for SACD(Super Audio Compact Disc) proposed by Sony and philips, uses 1 bit representation with a sampling frequency of 2.8224MHz (64${\times}$44.1kHz). For multi-rate PCM (Pulse Code Modulation) input such as 8${\sim}$192kHz, a external sample-rate converter is necessary to the DSD encoder. This paper has been proposed a digital mter structure composed of sample-rate converter and interpolaton filter for the DSD encoder with multi-rate (8${\sim}$192kHz) PCM input, without a external sample-rate converter.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.804-807
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• 2005

Design Up/Down converters which use Digital IF(Intermediate Frequency) techniques from the present paper, against hereupon performance the criticism. The reason which uses Digital IF techniques is configured of passive elements and the positions IF frequency domains are fixed and they do not use in the position one frequency but, the external fringe land of the board which comes to be configured with Digital IF without from the communication frequency domain which is various there to be a flexibility, the use was under possibility. Like this configuration compares in analog Heterodyne mode of existing and it has the performance upgrade which is excellent it shows a high flexibility.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.6
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• pp.567-572
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• 2004

This paper shudies an automatic gain control(AGC) algorithm used in wireless communication cellular systems. The AGC design includes the selection of the appropriate analog-to-digital converter(ADC) and keeping the input power to the ADC constant to minimize the quantization noise generated from the analog-to-digital conversion process. In this paper the process to determine the required precision or the An is illustrated and the method to set the design parameters of the AGC is proposed. And the validity of the proposed algorithm is verified by computer simulation.

• Journal of electromagnetic engineering and science
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• v.1 no.2
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• pp.131-138
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• 2001

The DTV (Digital TV) tuner for an 8-VSB (Vestigial Side-Band) modulation was developed to meet the requirements of the ATSC (Advanced Television Systems Committee). The double frequency conversion and the active tracking filter in the front-end were used to cancel interferences between adjacent channels and multi-channels by suppressing the IF beat and the Image frequency. However, It was impossible to get frequency mapping between the tracking filter and the first VCO (Voltage Controlled Oscillator) in the existing DTV tuner structure which differs from the NTSC (National Television Systems Committee) tuner. This paper, therefore, suggests an assailable structure and a new method for the automatic frequency selection by mapping the frequency characteristics over the tracking voltage and the combined HW which is composed of a Micro-controller, an EEPROM (Electrically Erasable Programmable Read Only Memory), a DAC (Digital-to-Analog Converter), an OP amplifier, and a switch driver.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.686_687
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• 2009

The traceability maintenance system for the AC voltage and current has been developed at the frequency range of 20 Hz to 100 Hz without using any compensation technique which is used at thermal converter (TC) ac-dc transfer system at low frequencies. The system uses a digital voltmeter (DVM) as a data acquisition system of the input waveform and stored data in memory. The developed algorithm acquires and processes the sampling data to calculate the root mean square (rms) value of the input voltage of DVM which operates at DC 10 V range for better accuracy. The best uncertainty of the AC voltage measurements is $3 {\mu}V/V$ within the frequency range. The best uncertainty of the AC current measurements is better than the $5 {\mu}A/A$ and mainly depend on the current to voltage converter, ac-dc current shunt or Current Transformer (CT), used for the measurement

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.3
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• pp.69-80
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• 2015

This paper is writing about developing magnet power supply. It is very important for power supply to obtain output current in high precision and high stability. As a switching noise and a power noise are the cause of disrupting the stability of output current, to remove these at the front end, low pass filter with 300Hz cutoff frequency is designed and placed. And also to minimize switching noise of the current into magnet and to stop abrupt fluctuations, output filter should be designed, when doing this, we design it by considering load has high value inductance. As power supply demands the stability of less than 5ppm, high precision 24bit(300nV/bit) analog digital converter is needed. As resolving power of 24bit(300nV/bit) analog digital converter is high, it is also very important to design the input stage of analog digital converter. To remove input noise, 4th order low pass filter is composed. Due to the limitation of clock, to minimize quantization error between 15bit DPWM and output of ADC having 24bit resolving power, ${\Sigma}-{\Delta}$ modulation is used and bit contracted DPWM is constituted. And before implementing, to maximize efficiency, simulink is used.