• Title/Summary/Keyword: frame delay

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An Improved Stationary Frame-based Digital Current Control Scheme for a PM Synchronous Motor

  • Kim Kyeong-Hwa;Youn Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.174-178
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    • 2001
  • An improved stationary frame-based digital current control technique for a permanent magnet (PM) synchronous motor is presented. Generally, the stationary frame current controller is known to provide the advantage of a simple implementation. However, there are some unavoidable limitations such as a steady-state error and a phase delay in the steady-state. On the other hand, in the synchronous frame current regulator, the regulated currents are dc quantities and a zero steady-state error can be obtained through the integral control. However, the need to transform the signals between the stationary and synchronous frames makes the implementation of a synchronous frame regulator complex. Although the PI controller in the stationary frame gives a steady-state error and a phase delay, the control performance can be greatly improved by employing the exact decoupling control inputs for the back EMF, resulting in an ideal steady-state control characteristics irrespective of an operating condition as in the synchronous PI decoupling controller. However, its steady-state response may be degraded due to the inexact cancellation inputs under the parameter variations. To improve the control performance in the stationary frame, the disturbance is estimated using the time delay control. The proposed scheme is implemented on a PM synchronous motor using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

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An Improved Stationary Frame-based Digital Current Control Scheme for a PM Synchronous Motor

  • Kim, Kyeong-Hwa;Young, Myung-Joong
    • Journal of Power Electronics
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    • v.1 no.2
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    • pp.88-98
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    • 2001
  • An improved stationary frame-based digital current control technique for a permanent magnet(PM) synchronous motor is presented. Generally, the stationary frame current controller is known to provide the advantage of a simple implementation. However, there are some unavoidable limitations such as a steady-state error and a phase delay in the steady-state. On the other hand, in the synchronous frame current regulator the regulated currents are dc quantities and a zero steady-state error can be obtained through the integral control. However, the need to transform the signals between the stationary and synchronous frames makes the implementation of a synchronous frame regulator complex. Although the PI controller in the stationary frame gives a steady-state error and a phase delay, the control performance can be greatly improved by employing the exact decoupling control inputs for the back EMF., resulting in an ideal steady-state control characteristics irrespective of an operating condition as in the synchronous PI decoupling controller. However, its steady-state response may be degraded due to the inexact cancellation inputs under the parameter variations. To improve the control performance in the stationary frame, the disturbance is estimated using the time delay control. The proposed scheme is implemented on a PM synchronous motor using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

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Case Studies: Schedule Delay Factors and Delay Prevention Program for Concrete Frame Works in Apartment Construction Project (사례분석을 통한 아파트 골조공사의 공기지연 요인 도출 및 개선방안)

  • Cho, Tae-Jea;Choi, Jong-Soo
    • Journal of the Korea Institute of Building Construction
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    • v.11 no.1
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    • pp.9-17
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    • 2011
  • Project delay is one of the most crucial impact factors in the construction process from a schedule and cost management perspective. This study focused on analyzing the causes of concrete frame work delay in the apartment construction project. According to the analysis of project cost composition, the direct cost of concrete works was highest in most samples. Actual delays of concrete works were analyzed for the six different construction components. Causes of delay were grouped into two categories; preconstruction and construction phases and these two groups were further divided into sub-groups. Analysis results revealed that the most significant delay was occurred in the 1st. floor concrete skeleton work. For each delay factor, implications of delay as well as suggestion(s) for reducing the possibility of schedule delay are provided.

Analysis of Progress Schedule and Delay Element of Frame Works in Apartments (아파트 구체공사의 공정관리 및 공기지연요소 분석에 관한 연구)

  • 최은준;최민권;조형근
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2003.05a
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    • pp.157-160
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    • 2003
  • In order to reduce the construction cost and period without degrading the quality, construction companies are making a lot of efforts to prefabricate and mechanize the construction process, and introducing and utilizing various techniques of construction time management in the process of construction. However, due to the various factors (such as weather conditions, labor factors, supply of equipment and materials, safety accident, etc) in the process of construction, construction projects are not frequently completed within the scheduled Period. This research is to examine the current status of construction time management and factors causing delay in construction with regard to the concrete work (such as form work, steel reinforcement, and concrete work) in building apartments.

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Design of Zigbee Beacon Frame for High Efficiency Transmit in Home Network (홈 네트워크에서 고효율 전송을 위한 Zigbee Beacon Frame 설계)

  • Han, Kyoung-Heon;Han, Seung-Jo;Choi, Hyun-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.11B
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    • pp.1373-1382
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    • 2011
  • Zigbee is communication technology most ideal because Zigbee support low power communication and wide expansion in wireless home network. However, Zigbee is not popular, because of Zigbee always has Hidden Node Problem and Transit Delay Problem. We propose new Beacon Frame structure to solve the two problem in Zigbee. New Beacon Frame structure reduces a Super Frame Duration and add a same space of a Control Frame Duration. We expect to solved method of Hidden Node Problem that exchange terminal information to using RTS/CTS. Also, We expect to solved method of Transit Delay Problem that put Beacon between Control Frame Duration and Super Frame Duration for synchronization. We confirm new Beacon Frame to solved two problem in OPNET simulation at Zigbee QoS Parameters. We measure Delay(sec) for solution degree of Transit Delay Problem, and measure Throughput(bits/sec) and Load (bits/sec) for solution degree of Hidden Node Problem.

Performance Anomaly of the IEEE 802.11 DCF in Different Frame Error Rate Conditions

  • Kang, Koohong
    • Journal of Information Processing Systems
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    • v.8 no.4
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    • pp.739-748
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    • 2012
  • We propose an analytic model to compute the station's saturated throughput and packet delay performance of the IEEE 802.11 DCF (Distributed Coordination Function) in which frame transmission error rates in the channel are different from each other. Our analytic model shows that a station experiencing worse frame error rates than the others suffers severe performance degradation below its deserved throughput and delay performance. 802.11 DCF adopts an exponential back-off scheme. When some stations suffer from high frame error rates, their back-off stages should be increased so that others get the benefit from the smaller collision probabilities. This impact is then recursively applied to degrade the performance of the victim stations. In particular, we show that the performance is considerably degraded even if the frame error rate of the victim station satisfies the receiver input level sensitivity that has been specified in the IEEE 802.11 standard. We also verify the analytic results by the OPNET simulations.

Rate control to reduce bitrate fluctuation on HEVC

  • Yoo, Jonghun;Nam, Junghak;Ryu, Jiwoo;Sim, Donggyu
    • IEIE Transactions on Smart Processing and Computing
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    • v.1 no.3
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    • pp.152-160
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    • 2012
  • This paper proposes a frame-level rate control algorithm for low delay video applications to reduce the fluctuations in the bitrate. The proposed algorithm minimizes the bitrate fluctuations in two ways with minimal coding loss. First, the proposed rate control applies R-Q model to all frames including the first frame of every group of pictures (GOP) except for the first one of a sequence. Conventional rate control algorithms do not use any R-Q models for the first frame of each GOP and do not estimate the generated-bit. An unexpected output rate result from the first frame affects the remainder of the pictures in the rate control. Second, a rate-distortion (R-D) cost is calculated regardless of the hierarchical coding structure for low bitrate fluctuations because the hierarchical coding structure controls the output bitrate in rate distortion optimization (RDO) process. The experimental results show that the average variance of per-frame bits with the proposed algorithm can reduce by approximately 33.8% with a delta peak signal-to-noise ratio (PSNR) degradation of 1.4dB for a "low-delay B" coding structure and by approximately 35.7% with a delta-PSNR degradation of 1.3dB for a "low-delay P" coding structure, compared to HM 8.0 rate control.

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Performance Improvements of DFSA(Dynamic Frame Slotted Aloha) Algorithm through Estimation of Intial frame Size (초기 프레임 크기 예측을 통한 DFSA(Dynamic Frame Slotted Aloha) 알고리즘 성능 개선)

  • Lee, Kang-Won;Lee, Moon-Hyung;Lee, Hyun-Kyo;Lim, Kyoung-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.8
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    • pp.1517-1530
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    • 2017
  • Traditional anti-collision algorithms determine slot size of initial frame based on the information of number of collision slots, idle slots, and success slots. Since there is no information about collision at the beginning of tag information collection, traditional anti-collision algorithms can not determine the initial frame size. Considering that performance of anti-collision algorithm is very sensitive to initial slot size traditional anti-collision algorithms need some improvements. In this study two methods are proposed to determine slot size of initial frame efficiently, through which we can improve the performance of dynamic frame slotted aloha algorithm. To verify the performance of proposed algorithms, 2.4GHz RFID system is used. Throughput and delay time are derived through simulation, which is developed using JAVA. We have seen that proposed algorithm improves throughput by 9.6% and delay time by 9.8%.

A Low-Delay MAC(LD-MAC) protocol in Multi-Hop Wireless Sensor Networks (멀티 홉 무선 센서 네트워크에서 저 지연을 지원하는 MAC 프로토콜)

  • Jeon, Jun-Heon;Kim, Seong-Cheol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.2
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    • pp.452-458
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    • 2014
  • In Wireless Sensor Networks the Medium access control (MAC) protocol has many challenges to solve such as reducing energy consumption, supporting QoS(quality of service) fairness, and reducing delivery delay. This paper proposed a low-delay supporting MAC protocol in multi-hop Wireless Sensor Networks. The proposed protocol uses the RB(rapid beacon) frame for reducing delivery delay. The RB frame is a modified IEEE 802.15.4 beacon frame. For sender adaptive-wakeup, the RB frame includes a seed number for determining of a receiver wakeup time. And for next hop receiver adaptive-wakeup, the RB frame includes the length of remaining data packet information. Results showed that our LD-MAC protocol outperformed other protocol in terms of data packet delivery delay.

On the long-term stability of the Y4KCam shutter

  • Lee, Jae-Woo
    • The Bulletin of The Korean Astronomical Society
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    • v.40 no.1
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    • pp.82.1-82.1
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    • 2015
  • We investigate the long-term spatial drift of the center and the temporal variation of the shutter delay time map of Y4KCam mounted on the CTIO 1.0m telescope. We have collected shutter delay time maps for over 7 years as a part of long-term survey program. We find that the center of the shutter delay time map can drift up to $450{\mu}m$ on the CCD. This effect can result in a small amount of error unless the proper shutter delay time correction, but it does not appear to cause any significant problems in photometric measurements. We obtain the mean value of the shutter delay time of $69.1{\pm}0.9$ msec and find no temporal variation of the shutter delay time of Y4KCam for over 7 years, indicative of the mechanical stability of the shutter. We suggest that using a master shutter delay time correction frame would be sufficient to achieve high precision photometry and this does not add up errors more than ~ 2.5 mmag across the CCD frame with exposure times longer than 1 sec.

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