• 한국신재생에너지학회:학술대회논문집
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• 2005.11a
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• pp.665-665
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• 2005

The existing DSP for utility interactive photovoltaic generation system control generally uses floating point process type. Because it is easy to use for number crunching, however, it is too late and too expensive. Fixed point process DSP TMS320F2812, has high control speed and is rather inexpensive. A very complicated real system can be simulated using hardware-in-the-loop (HIL) system in a virtual environment Therefore, HIL system can speed up research and development process with a little effort. Also current DSP for utility interactive photovoltaic generation system adopts floating point process type, which is easy to use for number crunching. However, fixed point process DSF, TMS320F2812, has high control speed and is rather inexpensive. This paper presents more efficient method for MPPT control using TMS320F2812 along with HIL System.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.365-374
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• 1996

Finite wordlength effects of the FS-1016 CELP(Code Excite Linear Prediction) vocoder algorithm) is analyzed, and a block floating-Point implementation method is employed to improve the fixed-point performance. An efficient run-time integer wordlength estimation algorithm is developed, and the overall system performance. An efficient run-time integer wordlength estimation algorithm is developed, and the overall system performance is verified in real-time using a TMS320C50 emulation board. Autoscaler software that conducts simulation-based automatic scaling to provide a floating-point like programming environment is used for this application development.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.873-874
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• 2006

In this paper, we have developed a ventricular fibrillation detection system based on DSP processor. The developed system was able to detect VF in real time correctly and quickly. We compared the performance of the floating point simulation with that of fixed point simulation. The computational cost of fixed point simulation was remarkably reduced than that of floating point simulation.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2003.10a
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• pp.323-328
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• 2003

A basic design on a flexible riser in a floating type development system for upwelling deep ocean water is presented. In the numerical study, an implicit finite difference algorithm is employed for three-dimensional riser equations. Fluid and geometric non-linearity and bending stiffness are considered and solved by Newton-Raphson iteration. To keep the depth of end point of a flexible and light riser is very important for upwelling deep ocean water in a floating type development system. Weight attached at the end point of the riser in order to keep its intake depth is designed under the strong surface current and the configuration of the riser is predicted. The results of this study can be contributed to the design of the development system in floating type for upwelling deep ocean water.

• Journal of Korean Society on Water Environment
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• v.37 no.6
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• pp.493-500
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• 2021

Floating solar photovoltaic (hereinafter PV) power generation is emerging as a proper alternative to overcome various environmental limitations of existing offshore PV generation. However, more government-led policy design and technical and institutional development are still required. Based on the policy agenda setting theory and technological innovation theory, this study contains the research questions concerning the co-evolution of technology and the floating solar PV policy. This study primarily evaluates the technological and institutional development level of floating solar PV policy through a survey of domestic floating solar PV experts. Secondly, we also analyze the kind of policy agenda that should be set a priori. Analyzing the priorities to be considered, the first environmental enhancement needs to be considered from both the technical and institutional aspects. The second candidate task for the policy agenda is residents' conflict and improvement of regulations. Both candidate tasks need to be actively considered in the policy agenda from the institutional point of view. The third is publicity, profit sharing, follow-up monitoring, and cost. Among them, public relations and profit sharing are tasks that need to be considered in the policy agenda from the institutional point of view. On the other hand, the cost of follow-up monitoring should be considered as a policy agenda in terms of technology, system, and common aspects. Finally, there are technical standards. Likewise, technical standards need to be considered in the policy agenda in terms of both technical and institutional commonality.

• The Journal of the Convergence on Culture Technology
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• v.9 no.4
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• pp.625-631
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• 2023

This study proposes an analysis model that can reflect the actual behavior of the rail floating track, and the most reasonable model was analyzed through field measurement and numerical analysis. It was analyzed that the current design theory analysis results of rail floating tracks were different from the field measurement results and were not suitable to reflect the actual behavior. In the rail floating track, it was analyzed that the subsidence of the point directly affects the total displacement rather than the displacement due to the bending of the rail. As a result of numerical analysis, it was analyzed that the analysis result of the proposed model, which is a parallel arrangement spring model that does not have a support point directly below the rail, reflects the actual behavior. The analysis model presented in this study can be used to predict track behavior when designing and maintaining rail floating tracks in the future.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.711-714
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• 2005

We propose floating point arithmetic units for geometry operation of mobile 3D graphic processor. The proposed arithmetic units conform to the single precision format of IEEE standard 754-1985 that is a standard of floating point arithmetic. The rounding algorithm applies the nearest toward zero form. The proposed adder/subtraction unit and multiplier have one clock cycle latency, and the inversion unit has three clock cycle latency. We estimate the required numbers of arithmetic operation for Viewing transformation. The first stage of geometry operation is composed with translation, rotation and scaling operation. The translation operation requires three addition and the rotation operation needs three addition and six multiplication. The scaling operation requires three multiplication. The viewing transformation is performed in 15 clock cycles. If the adder and the multiplier have their own in/out ports, the viewing transformation can be done in 9 clock cycles. The error margin of proposed arithmetic units is smaller than $10^{-5}$ that is the request in the OpenGL standard. The proposed arithmetic units carry out operations in 100MHz clock frequency.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.7
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• pp.513-518
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• 2016

The piezoelectric actuating device is known for its large power density and simple structure. It can generate a larger force than a conventional actuator and has also wide bandwidth with fast response in a compact size. To control the piezoelectric actuator, we need an analog signal conditioning circuit as well as digital microcontrollers. Conventional microcontrollers are not equipped with an analog part and need digital-to-analog converters, which makes the system bulky compared with the small size of piezoelectric devices. To overcome these weaknesses, we are developing a single-chip controller that can handle analog and digital signals simultaneously using mixed-signal FPGA technology. This gives more flexibility than traditional fixed-function microcontrollers, and the control speed can be increased greatly due to the parallel processing characteristics of the FPGA. In this paper, we developed a floating-point multiplier, PWM generator, 80-kHz power control loop, and 1-kHz position feedback control loop using a single mixed-signal FPGA. It takes only 50 ns for single floating-point multiplication. The PWM generator gives two outputs to control the charging and discharging of the high-voltage output capacitor. Through experimentation and simulation, it is demonstrated that the designed control loops work properly in a real environment.

• Journal of Broadcast Engineering
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• v.13 no.3
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• pp.415-418
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• 2008

Some embedded microprocessors do not have an FPU(Floating Point Unit) due to a circuit complexity and power consumption. The performance speed of MPEG-4 AAC decoder on this hardware environment would be slower than corresponding speed for playing back of the decoded results. Therefore, irritating and high-pitched noises are interleaved in the original the audio data. So, in order to play MPEG-4 AAC file on such PDA, a new algorithm that transforms floating-point arithmetic to one with integers, is needed. We have developed a transformation algorithm from floating-point operation to integer operation and implemented the PDA's AAC Player. We also show the efficiency of our proposed method with the experimental results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.320-323
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• 2010

This paper proposes efficient log and exponent calculation methods using a dual phase instruction set without additional ALU unit for a mobile enviroment. Using the Dual Phase Instruction set, it extracts exponent and mantissa from expression of floating point and calculates 24bit single precision floating point of log approximation using the Taylor series expansion algorithm. And with dual phase instruction set, it reduces instruction excution cycles. The proposed Dual Phase architecture reduces the performance degradation and maintain smaller size.