• Title/Summary/Keyword: flip

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Flip Chip Process on CNT-Ag Composite Pads for Stretchable Electronic Packaging (신축성 전자패키징을 위한 CNT-Ag 복합패드에서의 플립칩 공정)

  • Choi, Jung Yeol;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.4
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    • pp.17-23
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    • 2013
  • As a basic research to develop stretchable electronic packaging technology, CNT-Ag composite pads were formed on top of Cu/Sn chip bumps and flip-chip bonded using anisotropic conductive adhesive. Average contact resistances of the flip-chip joints were measured with respect to bonding pressure and presence of the CNT-Ag composite pads. When Cu/Sn chip bumps with CNT-Ag composite pads were flip-chip bonded to substrate Cu pads at 25MPa or 50 MPa, contact resistance was too high to measure. The specimen processed by flip-chip bonding the Cu/Sn chip bumps with CNT-Ag composite pads to the substrate Cu pads exhibited an average contact resistance of $213m{\Omega}$. On the other hand, the flip-chip specimens processed by bonding Cu/Sn chip bumps without CNT-Ag composite pads to substrate Cu pads at 25MPa, 50MPa, and 100MPa exhibited average contact resistances of $370m{\Omega}$, $372m{\Omega}$, and $112m{\Omega}$, respectively.

Microstructure and Contact Resistance of the Au-Sn Flip-Chip Joints Processed by Electrodeposition (전기도금법을 이용하여 형성한 Au-Sn 플립칩 접속부의 미세구조 및 접속저항)

  • Kim, S.K.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.4
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    • pp.9-15
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    • 2008
  • Microstructure and contact resistance of the Au-Sn solder joints were characterized after flip-chip bonding of the Au/Sn bumps processed by successive electrodeposition of Au and Sn. Microstructure of the Au-Sn solder joints, formed by flip-chip bonding at $285^{\circ}C$ for 30 sec, was composed of the $Au_5Sn$+AuSn lamellar structure. The interlamellar spacing of the $Au_5Sn$+AuSn structure increased by reflowing at $310^{\circ}C$ for 3 min after flip-chip bonding. While the Au-Sn solder joints formed by flip-chip bonding at $285^{\circ}C$ for 30 sec exhibited an average contact resistance of 15.6 $m{\Omega}$/bump, the Au-Sn solder joints reflowed at $310^{\circ}C$ for 3 min after flip-chip bonding possessed an average contact resistance of 15.0 $m{\Omega}$/bump.

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Thermal Cycling and High Temperature Storage Reliabilities of the Flip Chip Joints Processed Using Cu Pillar Bumps (Cu Pillar 플립칩 접속부의 열 싸이클링 및 고온유지 신뢰성)

  • Kim, M.Y.;Lim, S.K.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.3
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    • pp.27-32
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    • 2010
  • For the flip chip joints processed using Cu pillar bumps and Sn pads, thermal cycling and high temperature storage reliabilities were examined as a function of the Sn pad height. With increasing the height of the Sn pad, which composed of the flip chip joint, from 5 ${\mu}m$ to 30 ${\mu}m$, the contact resistance of the flip chip joint decreased from 31.7 $m{\Omega}$ to 13.8 $m{\Omega}$. Even after thermal cycles of 1000 times ranging from $-45^{\circ}C$ to $125^{\circ}C$, the Cu pillar flip chip joints exhibited the contact resistance increment below 12% and the shear failure forces similar to those before the thermal cycling test. The contact resistance increment of the Cu pillar flip chip joints was maintained below 20% after 1000 hours storage at $125^{\circ}C$.

Design of Programmable Quantum-Dot Cell Structure Using QCA Clocking Based D Flip-Flop (QCA 클록킹 방식의 D 플립플롭을 이용한 프로그램 가능한 양자점 셀 구조의 설계)

  • Shin, Sang-Ho;Jeon, Jun-Cheol
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.6
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    • pp.33-41
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    • 2014
  • In this paper, we propose a D flip-flop based on quantum-dot cellular automata(QCA) clocking and design a programmable quantum-dot cell(QPCA) structure using the proposed D flip-flop. Previous D flip-flops on QCA are that input should be set to an arbitrary value, and wasted output values exist because it was utilized to duplicate by clock pulse and QCA clocking. In order to eliminate these defects, we propose a D flip-flop structure using binary wire and clocking technique on QCA. QPCA structure consists of wire control logic, rule control logic, D flip-flop and XOR logic gate. In experiment, we perform the simulation of QPCA structure using QCADesigner. As the result, we confirm the efficiency of the proposed structure.

Reliable Anisotropic Conductive Adhesives Flip Chip on Organic Substrates For High Frequency Applications

  • Paik, Kyung-Wook;Yim, Myung-Jin;Kwon, Woon-Seong
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.04a
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    • pp.35-43
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    • 2001
  • Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers. Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of $SiO_2filler$ to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. Our results indicate that the electrical performance of ACF combined with electroless Wi/Au bump interconnection is comparable to that of solder joint.

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Bonding process parameter optimization of flip-chip bonder (Flip-chip 본딩 장비 제작 및 공정조건 최적화)

  • Shim H.Y.;Kang H.S.;Jeong H.;Cho Y.J.;Kim W.S.;Kang S.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.763-768
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    • 2005
  • Bare-chip packaging becomes more popular along with the miniaturization of IT components. In this paper, we have studied flip-chip process, and developed automated bonding system. Among the several bonding method, NCP bonding is chosen and batch-type equipment is manufactured. The dual optics and vision system aligns the chip with the substrate. The bonding head equipped with temperature and force controllers bonds the chip. The system can be easily modified for other bonding methods such as ACF In bonding process, the bonding forte and temperature are known as the most dominant bonding parameters. A parametric study is performed for these two parameters. For the test sample, we used standard flip-chip test kit which consists of FR4 boards and dummy flip-chips. The bonding test was performed fur two types of flip-chips with different chip size and lead pitch. The bonding temperatures are chosen between $25^{\circ}C\;to\;300^{\circ}C$. The bonding forces are chosen between 5N and 300N. The bonding strength is checked using bonding force tester. After the bonding force test, the samples are examined by microscope to determine the failure mode. The relations between the bonding strength and the bonding parameters are analyzed and compared with bonding models. Finally, the most suitable bonding condition is suggested in terms of temperature and force.

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Flip Chip Process on the Local Stiffness-variant Stretchable Substrate for Stretchable Electronic Packages (신축성 전자패키지용 강성도 국부변환 신축기판에서의 플립칩 공정)

  • Park, Donghyeun;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.4
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    • pp.155-161
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    • 2018
  • A Si chip with the Cu/Au bumps of $100-{\mu}m$ diameter was flip-chip bonded using different anisotropic conductive adhesives (ACAs) onto the local stiffness-variant stretchable substrate consisting of polydimethylsiloxane (PDMS) and flexible printed circuit board (FPCB). The average contact resistances of the flip-chip joints processed with ACAs containing different conductive particles were evaluated and compared. The specimen, which was flip-chip bonded using the ACA with Au-coated polymer balls as conductive particles, exhibited a contact resistance of $43.2m{\Omega}$. The contact resistance of the Si chip, which was flip-chip processed with the ACA containing SnBi solder particles, was measured as $36.2m{\Omega}$, On the contrary, an electric open occurred for the sample bonded using the ACA with Ni particles, which was attributed to the formation of flip-chip joints without any entrapped Ni particles because of the least amount of Ni particles in the ACA.

A Design of an Effective Bus-Invert Coding Circuit Using Flip-Driver (Flip-Driver를 이용한 효율적인 Bus-Invert Coding 회로의 설계)

  • Yoon, Myung-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.69-76
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    • 2007
  • A new circuit design for Bus-Invert Coding is presented in this paper. The new scheme sends the coding information through the bus-lines instead of the invert-line which has been used conventionally for many types of Bus-Invert algorithms. By employing a newly developed bus-driver called Flip-Driver and a selection circuit, it not only removes the invert-line but suppresses the additional bus-transitions in sending coding information. It is verified by simulations that the efficiency of various Bus-Invert algorithms is increased about 40% to 100% by employing the new design.

Electromigration of Sn-3.5 Solder Bumps in Flip Chip Package (플립칩 패키지내 Sn-3.5Ag 솔더범프의 electromigration)

  • 이서원;오태성
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.4
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    • pp.81-86
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    • 2003
  • Electromigration of Sn-3.5Ag solder bump was investigated using flip chip specimens which consisted of upper Si chip and lower Si substrate. While the resistance of the flip chip sample did not almost change until the time right before the failure, the resistivity increased abruptly at the moment when complete failure of the solder joint occurred in the flip chip sample. At current densities of $3\times 10^4$$4\times 10^4$A/$\textrm{cm}^2$, the activation energy for electromigration of the Sn-3.5Ag solder bump was characterized as ∼0.7 eV. Failure of the Sn-3.5Ag solder bump occurred at the solder/UBM interface due to the formation and propagation of voids at cathode side of the solder bump.

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