• Journal of the Korean Society of Safety
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• v.12 no.3
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• pp.76-82
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• 1997

Flash points ire used to classify flammable liquids according to their relative flammability. Such a classification is important for the safe handling of flammable liquids which constitute the solvent mixtures. MRSM(modified response surface methodology)-1 and MRSM-2 models we suggested for the prediction of the flash points in the flammable ternary system. By means of this methodology, it is possible to predict the flash points of the flammable mixtures system using computer graphics in the triangular coordinate for the ternary system. The proposed methodology(MRSM) has been tested and compared successfully with previously reported flash points in journal for the ternary system.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.240-242
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• 2009

Flash memories are one of best media to support future computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation of SSD. Due to the unique characteristics of flash media and hard disk, the efficiency of I/O processing is severely reduced without special treatment, especially in the presence of heavy workload or bulk data copy. In this respect, we need to design and develop efficient hybrid-RAID storage system.

• 전기의세계
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• v.18 no.1
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• pp.7-10
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• 1969

This paper shows theoretically the possibility of raising up the flash over voltage in suspension insulators or bushing according to the results which was gotten by previous study done by the Author. If some conducting metallic barriers are inserted into the flash over discharge path, the flash over voltage is forund to be increased condiferablly. Applying this priciple, some methods of improving flash over characteristics are discussed theoretically.

• The Journal of Information Technology and Database
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• v.1 no.2
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• pp.103-125
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• 1994

In this paper, we introduce a new main memory storage system called FLASH that is designed for real-time applications. The FLASH system is characterized by the memory residency of data and a new fast and dynamic hashing scheme called extendible chained bucket hashing. We compared the performance of the new hashing algorithm with other well-known ones. Also, we carried out an experiment to compare the overall performance of the FLASH system with a commercial one. Both comparison results show that the new hashing scheme and the FLASH system outperforms other competitives.

• Fire Science and Engineering
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• v.7 no.2
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• pp.24-28
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• 1993

The flash point for flammable liquids (alcohol, aromatic compounds) were measured by Penskt-Martens's measuring apparatus with closed cup. As a result, it was observed that the flash points had the regular tendency according to the carbon number and the molecular structure. Consequently, the flash point for the alcohols were increased in proportion to the increase of the carbon number and branch number. The differences between the literature and experimental data are 14.6% for the relative error and 3.46$^{\circ}C$ in average for the measuring temperature.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.17-26
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• 2016

This work proposes a 12b 60MS/s 0.18um CMOS Flash-SAR ADC for various systems such as wireless communications and portable video processing systems. The proposed Flash-SAR ADC alleviates the weakness of a conventional SAR ADC that the operation speed proportionally increases with a resolution by deciding upper 4bits first with a high-speed flash ADC before deciding lower 9bits with a low-power SAR ADC. The proposed ADC removes a sampling-time mismatch by using the C-R DAC in the SAR ADC as the combined sampling network instead of a T/H circuit which restricts a high speed operation. An interpolation technique implemented in the flash ADC halves the required number of pre-amplifiers, while a switched-bias power reduction scheme minimizes the power consumption of the flash ADC during the SAR operation. The TSPC based D-flip flop in the SAR logic for high-speed operation reduces the propagation delay by 55% and the required number of transistors by half compared to the conventional static D-flip flop. The prototype ADC in a 0.18um CMOS demonstrates a measured DNL and INL within 1.33LSB and 1.90LSB, with a maximum SNDR and SFDR of 58.27dB and 69.29dB at 60MS/s, respectively. The ADC occupies an active die area of $0.54mm^2$ and consumes 5.4mW at a 1.8V supply.

• Journal of Advanced Navigation Technology
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• v.15 no.5
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• pp.801-807
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• 2011

If the System is downed by computer or disasters, it can have a bad influence on the reliability of the corporation and business continuity because all companies are computerized. Accordingly, interest on the business continuity without the loss of data in the corporate is increasing. In this paper, system faults have been defined as physical faults and logical faults and CDP solution using Flash SSD has been proposed for enhancing IOPS which is needed for realtime-backup. In order to measure IOPS performance of the CDP using Flash SSD, we constructed an experimental system. From the results we can see that IOPS performance of CDP using Flash SSD is about 50 times more effective than that of the S-ATA.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.7
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• pp.789-793
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• 2010

Recently, flash memory-based non-volatile cache (NVC) is emerging as an effective solution to enhance both I/O performance and energy consumption of storage systems. To get significant performance and energy gains by NVC, it would be better to use multi-level-cell (MLC) flash memories since it can provide a large capacity of NVC with low cost. However, the number of available program/erase cycles of MLC flash memory is smaller than that of single-level-cell (SLC) flash memory limiting the lifespan of NVC. To overcome such a limitation, SLC/MLC combined flash memory is a promising solution for NVC. In this paper, we propose an effective management scheme for heterogeneous SLC and MLC regions of the combined flash memory.

• Journal of the Semiconductor & Display Technology
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• v.7 no.3
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• pp.17-21
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• 2008

Application of flash memory in mobile and ubiquitous related devices is rapidly being increased due to its low price and high performance. In addition, some notebook computers currently come out into market with a SSD(Solid State Disk) instead of hard-drive based storage system. Regarding this trend, applications need to increase the storage capacity using multiple flash memory chips for larger capacity sooner or later. Flash memory based storage subsystem should resolve the performance bottleneck for writing in perspective of speed and lifetime according to its physical property. In order to make flash memory storage work with tangible performance, reclaiming of invalid regions needs to be controlled in a particular manner to decrease the number of erasures and to distribute the erasures uniformly over the whole memory space as much as possible. In this paper, we study the performance of flash memory recycling algorithms and demonstrate that the proposed algorithm shows acceptable performance for flash memory storage with multiple chips. The proposed cleaning method partitions the memory space into candidate memory regions, to be reclaimed as free, by utilizing threshold values. The proposed algorithm handles the storage system in multi-layered style. The impact of the proposed policies is evaluated through a number of experiments.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2004.05a
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• pp.91-94
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• 2004

Preform design techniques have been investigated in efforts to reduce die wear and forming load and to improve material flow, filing ratio, etc. In hot forging processes, a thin deformed part of a workpiece, known as a flash, is formed in the narrow gap between the upper and lower tools. Although designers make tools that generate a flash intentionally in order to improve flow properties, excessive flash increases die wear and forming load. Therefore, it is necessary to make a preform shape that can reduce the excessive flash without changing flow properties. In this paper, a new preform design technique is proposed to reduce the excessive flash in a metal forging process. After a finite element simulation of the process is carried out with an initial billet, the flow of material in the flash region is traced from the final shape to the initial billet. The region belonging to the flash is then easily found in the initial billet. The finite element simulation is then carried out again with the modified billet from which the selected region has been removed. In several iterations of this technique, the optimal preform shape that minimizes the amount of flash without changing the forgeability can be obtained.