• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.32-32
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• 2009

실리콘 박막 태양전지에서 전면 투명전도막(TCO)은 태양전지의 전기, 광학적 특성을 결정하는 중요한 기능을 한다. ZnO:Al TCO는 기존에 사용되던 $SnO_2:F$와는 비정질 실리콘(a-Si:H) 박막 태양전지의 윈도우 층으로 사용되는 p a-SiC:H와의 일함수(work function) 차이로 인해 접촉전위(contact barrier)를 형성하게 되며 이로 인해 태양전지의 충진율(fill factor)이 $SnO_2:F$에 비해 감소하는 단점을 보인다. 본 연구에서는 ZnO:Al/p a-SiC:H 계면의 접촉전위 발생원인 및 태양전지 충진율 감소현상에 관한 정확한 원인규명을 위해 다양한 특성을 갖는 버퍼층을 삽입하여 계면특성 및 태양전지의 동작특성을 분석하고자 한다.

• Korean Journal of Materials Research
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• v.30 no.10
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• pp.566-572
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• 2020

In the recent years, thin film solar cells (TFSCs) have emerged as a viable replacement for crystalline silicon solar cells and offer a variety of choices, particularly in terms of synthesis processes and substrates (rigid or flexible, metal or insulator). Among the thin-film absorber materials, SnS has great potential for the manufacturing of low-cost TFSCs due to its suitable optical and electrical properties, non-toxic nature, and earth abundancy. However, the efficiency of SnS-based solar cells is found to be in the range of 1 ~ 4 % and remains far below those of CdTe-, CIGS-, and CZTSSe-based TFSCs. Aside from the improvement in the physical properties of absorber layer, enormous efforts have been focused on the development of suitable buffer layer for SnS-based solar cells. Herein, we investigate the device performance of SnS-based TFSCs by introducing double buffer layers, in which CdS is applied as first buffer layer and ZnMgO films is employed as second buffer layer. The effect of the composition ratio (Mg/(Mg+Zn)) of RF sputtered ZnMgO films on the device performance is studied. The structural and optical properties of ZnMgO films with various Mg/(Mg+Zn) ratios are also analyzed systemically. The fabricated SnS-based TFSCs with device structure of SLG/Mo/SnS/CdS/ZnMgO/AZO/Al exhibit a highest cell efficiency of 1.84 % along with open-circuit voltage of 0.302 V, short-circuit current density of 13.55 mA cm^-2, and fill factor of 0.45 with an optimum Mg/(Mg + Zn) ratio of 0.02.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.11
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• pp.20-25
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• 2016

This study addresses a low complexity and lossless frame memory compression algorithm based on block-buffer structure for efficient high resolution video processing. Our study utilizes the block-based MHT (modified Hadamard transform) for spatial decorrelation and AGR (adaptive Golomb-Rice) coding as an entropy encoding stage to achieve lossless image compression with low complexity and efficient hardware implementation. The MHT contains only adders and 1-bit shift operators. As a result of AGR not requiring additional memory space and memory access operations, AGR is effective for low complexity development. Comprehensive experiments and computational complexity analysis demonstrate that the proposed algorithm accomplishes superior compression performance relative to existing methods, and can be applied to hardware devices without image quality degradation as well as negligible modification of the existing codec structure. Moreover, the proposed method does not require the memory access operation, and thus it can reduce costs for hardware implementation and can be useful for processing high resolution video over Full HD.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.69.2-69.2
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• 2010

Recently, bulk hetero-junction cells have been extensively studied by many researchers. Most of these cells were fabricated by spin coater. However, the spin coating process is not favorable to the large-scaled industry because it is not compatible with roll-to-roll process. One of the alternative methods is Doctor blading. In this study, we fabricated large OPV cells having total area of $100cm^2$. The buffer layer was Poly-(3,4-ethylenedioxythiophene) : poly-(styrenesulfonate) aqueous dispersion (PEDOT:PSS) and the active material is poly (3-hexythiophene) (P3HT) and phenyl-C61-butyric acid methyl ester (PCBM) blend in the solvent of Chlorobenzene. All of the organic layers were coated by dragging the blade with a speed of 5~20 mm/s on the stage with a temperature of $50^{\circ}C$. As-bladed PEDOT:PSS layer was baked at $120^{\circ}C$ for 10 minutes to eliminate the water. The cell structure is patterned ITO substrate/PEDOT:PSS/P3HT:PCBM/LiF/Al. The topmost electrode, LiF/Al, was deposited by thermal evaporation. After depositing electrode, and the cell was annealed at $150^{\circ}C$ for 30 minutes. The measured ISC, VOC, fill factor, and PCE were 2.95 A, 5.86 V, 0.32, and 0.78%, respectively. PCE was quite low but the large active area could be obtained successfully.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.319-319
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• 2010

칼코젠계 태양전지의 광흡수층으로 사용되는 CuInSe2은 직접천이형 반도체로 광흡수계수가 $1{\times}105cm-1$로 매우 높고, 전기광학적 안정성이 우수하여 실리콘 결정질 태양전지를 대체할 고효율 태양전지로 각광받고 있다. 광흡수층의 밴드갭 에너지가 증가하면 태양전지의 개방전압(Voc)이 증가하여 광변환 효율을 향상시킬 수 있으므로, CuInSe2에서 In의 일부를 Ga으로 치환하여 에너지 밴드갭의 변화를 주는 연구가 많이 진행되고 있다. 그러나 화합물내의 Ga 조성비가 증가하면 단락전류(Jsc), 충진률(fill factor)이 낮아져 태양전지 효율을 저하시키게 되므로 CIGS 박막의 적절한 화합물 조성비를 갖도록 최적조건을 확립하는 것이 매우 중요하다. 본 실험에서는 광흡수층 형성을 위해 Sputtering법으로 금속 전구체를 증착하고, 고온에서 셀렌화 열처리를 수행하는 Sequential process(2단계 증착법)를 이용하였다. soda-lime glass 기판에 Back contact으로 Mo를 증착하고, 1단계로 CuIn0.7Ga0.3 조성비의 타겟을 이용하여 Sputtering법으로 $0.5{\sim}2{\mu}m$ 두께의 CIG 전구체를 증착하였다. 2단계로 CIG 전구체의 셀렌화열처리를 통하여 CIGS 화합물 구조의 박막을 형성시켰다. 이때 형성된 CIGS 화합물 박막의 두께는 동일하게 함으로써, 열처리온도에 의한 박막의 구조변화를 비교하였다. 증착된 CIGS 박막은 고온 엑스선회절분석을 통해 증착 두께와 온도 변화에 따른 CIGS 층의 구조 변화를 확인하고, 동일한 증착조건으로 Buffer layer, Window layer, Grid 전극을 형성하여 태양전지셀 특성을 평가함으로써 CIGS 태양전지 광흡수층의 결정구조에 따른 광변환 효율을 비교하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.221-228
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• 2005

In this work, our goal is to develop a fast and accurate power model of the ARM926EJ-S processor in the industrial design environment. Compared with existing work on processor power modeling which focuses on the power states of processor core, our model mostly focuses on the cache power model. It gives more than 93% accuracy and 1600 times speedup compared with post-layout gate-level power estimation. We also address two practical issues in applying the processor power model to the real design environment. One is to incorporate the power model into an existing commercial instruction set simulator. The other is the re-characterization of power model parameters to cope with different gate-level netlists of the processor obtained from different design teams and different fabrication technology.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.6
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• pp.646-651
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• 2018

This paper reports that the electronic properties at a $P3HT/TiO_2$ interface associated with exciton dissociation and transport can be tailored by the insertion of a graphene quantum dot (GQD) layer. For donor/acceptor interface modification in an $ITO/TiO_2/P3HT/Al$ photovoltaic (PV) device, a continuous GQD film was prepared by a sonication treatment in solution that simplifies the conventional processes, including laser fragmentation and hydrothermal treatment, which limits a variety of component layers and involves low cost processing. The high conductivity and favorable energy alignment for exciton dissociation of the GQD layer increased the fill factor and short circuit current. The origin of the improved parameters is discussed in terms of the broad light absorption and enhanced interfacial carrier transport.

• Journal of IKEEE
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• v.5 no.1 s.8
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• pp.111-120
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• 2001

VC merging involves distinguishing cells from an identical merged VC label. Various approaches have been proposed to help this identification process. However, most of them incur additional buffering, protocol overhead and/or variable delay. They make the provision of QoS difficult to achieve. So it was proposed a merge capable scheduler to support VC-merging (VCMS). However, in situations where all VCs are to be merged or the incoming traffic load is very low, it could happen that there are not enough non-merging cells to snoop. In this situation the scheduler uses special control cells to fill the empty time slots out. Too many control cells can cause high cell loss ratio and an additional packet transfer delay. To overcome the drawbacks, we propose a Sequence Skipping(SS) method where the sequencers skip the empty queues and insert SS cells. We show SS method is suitable for VC-merging and can reduce the cell loss ratio and the mean packet transfer delay through simulations.