• Title/Summary/Keyword: field effect transistor

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Synthesis of Uniformly Doped Ge Nanowires with Carbon Sheath

  • Kim, Tae-Heon;;Choe, Sun-Hyeong;Seo, Yeong-Min;Lee, Jong-Cheol;Hwang, Dong-Hun;Kim, Dae-Won;Choe, Yun-Jeong;Hwang, Seong-U;Hwang, Dong-Mok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.289-289
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    • 2013
  • While there are plenty of studies on synthesizing semiconducting germanium nanowires (Ge NWs) by vapor-liquid-solid (VLS) process, it is difficult to inject dopants into them with uniform dopants distribution due to vapor-solid (VS) deposition. In particular, as precursors and dopants such as germane ($GeH_4$), phosphine ($PH_3$) or diborane ($B_2H_6$) incorporate through sidewall of nanowire, it is hard to obtain the structural and electrical uniformity of Ge NWs. Moreover, the drastic tapered structure of Ge NWs is observed when it is synthesized at high temperature over $400^{\circ}C$ because of excessive VS deposition. In 2006, Emanuel Tutuc et al. demonstrated Ge NW pn junction using p-type shell as depleted layer. However, it could not be prevented from undesirable VS deposition and it still kept the tapered structures of Ge NWs as a result. Herein, we adopt $C_2H_2$ gas in order to passivate Ge NWs with carbon sheath, which makes the entire Ge NWs uniform at even higher temperature over $450^{\circ}C$. We can also synthesize non-tapered and uniformly doped Ge NWs, restricting incorporation of excess germanium on the surface. The Ge NWs with carbon sheath are grown via VLS process on a $Si/SiO_2$ substrate coated 2 nm Au film. Thin Au film is thermally evaporated on a $Si/SiO_2$ substrate. The NW is grown flowing $GeH_4$, HCl, $C_2H_2$ and PH3 for n-type, $B_2H_6$ for p-type at a total pressure of 15 Torr and temperatures of $480{\sim}500^{\circ}C$. Scanning electron microscopy (SEM) reveals clear surface of the Ge NWs synthesized at $500^{\circ}C$. Raman spectroscopy peaked at about ~300 $cm^{-1}$ indicates it is comprised of single crystalline germanium in the core of Ge NWs and it is proved to be covered by thin amorphous carbon by two peaks of 1330 $cm^{-1}$ (D-band) and 1590 $cm^{-1}$ (G-band). Furthermore, the electrical performances of Ge NWs doped with boron and phosphorus are measured by field effect transistor (FET) and they shows typical curves of p-type and n-type FET. It is expected to have general potentials for development of logic devices and solar cells using p-type and n-type Ge NWs with carbon sheath.

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Study on the Morphologies and Electrical Properties in Polymer Blend Thin-Films Based on Two Poly(3-hexylthiophene) Conjugated Polymers with Different Regio-regularities (서로 다른 위치 규칙성을 가지는 두 개의 Poly(3-hexylthiophene) 공액 고분자를 기반으로 한 고분자 복합 박막의 구조와 전기적 특성에 대한 연구)

  • Ganghoon Jeong;Nann Aye Mya Mya Phu;Rae-Su Park;Jeong Woo Yun;Yeongun Ko;Mincheol Chang
    • Composites Research
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    • v.36 no.5
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    • pp.349-354
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    • 2023
  • Poly(3-hexylthiophene) (P3HT) is a conjugated polymer that is highly soluble in organic solvents and is readily available. However, its electrical properties as an active channel in electronic devices are not enough for practical applications, necessitating further improvement in the properties. In this study, we demonstrate that the blending of two P3HT polymers (i.e., regio-regular (RR) P3HT and regio-random (RRa) P3HT) with different regioregularities can significantly improve charge transport characteristics of the blend films. The morphological and electrical properties of the blend films were systematically investigated by varying the ratio between two P3HT polymers. Atomic force microscopy (AFM), X-ray diffraction (XRD), and UV-visible absorption spectroscopy (UV-vis) were employed to evaluate the morphological and optoelectronic properties of the blend films. The crystallinity of the blend films increased with increasing the content of RRa-P3HT to 20 wt% and gradually decreased as the content increased to 80%. Consistently, the highest charge carrier mobility was obtained from the blend films containing 20 wt% RRa-P3HT, which value was measured to be 0.029 cm2/V·s. The values gradually decreased to 0.0007 cm2/V·s with increasing the content of RRa-P3HT to 80 wt%.

Fabrication and Characteristics of Zinc Oxide- and Gallium doped Zinc Oxide thin film transistor using Radio Frequency Magnetron sputtering at Room Temperature (Zinc Oxide와 갈륨이 도핑 된 Zinc Oxide를 이용하여 Radio Frequency Magnetron Sputtering 방법에 의해 상온에서 제작된 박막 트랜지스터의 특성 평가)

  • Jeon, Hoon-Ha;Verma, Ved Prakash;Noh, Kyoung-Seok;Kim, Do-Hyun;Choi, Won-Bong;Jeon, Min-Hyon
    • Journal of the Korean Vacuum Society
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    • v.16 no.5
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    • pp.359-365
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    • 2007
  • In this paper we present a bottom-gate type of zinc oxide (ZnO) and Gallium (Ga) doped zinc oxide (GZO) based thin film transistors (TFTs) through applying a radio frequency (RF) magnetron sputtering method at room temperature. The gate leakage current can be reduced up to several ph by applying $SiO_2$ thermally grown instead of using new gate oxide materials. The root mean square (RMS) values of the ZnO and GZO film surface were measured as 1.07 nm and 1.65 nm, respectively. Also, the transmittances of the ZnO and GZO film were more than 80% and 75%, respectively, and they were changed as their film thickness. The ZnO and GZO film had a wurtzite structure that was arranged well as a (002) orientation. The ZnO TFT had a threshold voltage of 2.5 V, a field effect mobility of $0.027\;cm^2/(V{\cdot}s)$, a on/off ratio of $10^4$, a gate voltage swing of 17 V/decade and it operated in a enhancement mode. In case of the GZO TFT, it operated in a depletion mode with a threshold voltage of -3.4 V, a field effect mobility of $0.023\;cm^2/(V{\cdot}s)$, a on/off ratio of $2{\times}10^4$ and a gate voltage swing of 3.3 V/decade. We successfully demonstrated that the TFTs with the enhancement and depletion mode type can be fabricated by using pure ZnO and 1wt% Ga-doped ZnO.

Growth and electrical properties of $Sr_2$$({Ta_{1-x}},{Nb_x})_2$)$O_7$ thin films by RF sputtering (RF Sputtering을 이용한 $Sr_2$$({Ta_{1-x}},{Nb_x})_2$)$O_7$ 박막의 성장 및 전기적 특성)

  • In, Seung-Jin;Choi, Hoon-Sang;Lee, Kwan;Choi, In-Hoon
    • Korean Journal of Materials Research
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    • v.11 no.5
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    • pp.367-371
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    • 2001
  • In this paper, theS $r_2$(T $a_{1-x}$ , N $b_{x}$)$_2$ $O_{7}$(STNO) films among ferroelectric materials having a low dielectric constant for metal-ferroelectric-semiconductor field effect transistor(MFS-FET) were discussed. The STNO thin films were deposited on p-type Si(100) at room temperature by co-sputtering with S $r_2$N $b_2$ $O_{7(SNO)}$ ceramic target and T $a_2$ $O_{5}$ ceramic target. The composition of STNO thin films was varied by adjusting the power ratios of SNO target and T $a_2$ $O_{5}$ target. The STNO films were annealed at 8$50^{\circ}C$, 90$0^{\circ}C$ and 9$50^{\circ}C$ temperature in oxygen ambient for 1 hour. The value of x has significantly influenced the structure and electrical properties of the STNO films. In the case of x= 0.4, the crystallinity of the STNO films annealed at 9$50^{\circ}C$ was observed well and the memory windows of the Pt/STNO/Si structure were 0.5-8.3 V at applied voltage of 3-9 V and leakage current density was 7.9$\times$10$_{08}$A/$\textrm{cm}^2$ at applied voltage of -5V.of -5V.V.V.

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