• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2003년도 ISIS 2003
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• pp.154-157
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• 2003

In order for testing faults of combinatorial logic circuit, the authors have developed a new diagnosis method: "Neural Network (NN) fault diagnosis", based on fm error back propagation functions. This method has proved the capability to test gate faults of wider range including so called SSA (single stuck-at) faults, without assuming neither any set of test data nor diagnosis dictionaries. In this paper, it is further shown that what kind of fault models can be detected in the NN fault diagnosis, and the simply modified one can extend to test delay faults, e.g. logic hazard as long as the delays are confined to those due to gates, not to signal lines.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 D
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• pp.1015-1017
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• 1997

A high impedance fault on the multi-grounded three-phase four-wire distribution system can not be detected by conventional overcurrent sensing devices. In this paper, the neural network is used to detect high impedance faults. The proposed algorithm using back - propagation neural network is demonstrated by simulation with the staged fault test data. The harmonic components of current and the phase of voltage are used as the inputs of neural network. Results of the simulation can be used as a reference for the development of a high impedance fault detector.

• International Journal of Control, Automation, and Systems
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• 제4권3호
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• pp.365-371
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• 2006

This paper presents an algorithm based on a combination of Discrete Wavelet Transforms and neural networks for detection and classification of internal faults in a two-winding three-phase transformer. Fault conditions of the transformer are simulated using ATP/EMTP in order to obtain current signals. The training process for the neural network and fault diagnosis decision are implemented using toolboxes on MATLAB/Simulink. Various cases and fault types based on Thailand electricity transmission and distribution systems are studied to verify the validity of the algorithm. It is found that the proposed method gives a satisfactory accuracy, and will be particularly useful in a development of a modern differential relay for a transformer protection scheme.

• 한국전기전자재료학회논문지
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• 제17권6호
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• pp.673-677
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• 2004

We present the basic properties of a superconductive fuse (SF) based on YBCO/Au films. The SF consists of YBCO stripes covered with Au layers for current shunt. The fault current was limited to a designed value in less than 0.4 msec by resistance development in YBCO/Au upon quenching. This enabled the SF to transfer small fault power and the suppressed current was sustained for more than 0.5 msec while Au layer melting and arcing. The arcing time was less than 2.5 msec, that is short enough to do self-interruption. Under the source voltage of 100 $V_{rms}$, the longer the duration time of fault current was, the shorter its discharge time was. The duration time of fault current and its discharge time were reduced by increased voltages in the range of 200 - 300 $V_{rms}$. We thought that this was because the quench propagation was limited by local melting generated with higher voltage.age.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 B
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• pp.811-813
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• 1996

High impedance fault can not be easily detected by conventional method. But if it would not be detected and cleared quickly, it can result in fires, and electric shock. In this paper, neural network, which has learning capability, is used for high impedance fault detector. The potential of the neural network approach is demonstrated by simulation using KEPCO's measured data. The instantaneous values and frequency spectrum of current are respectively used as the inputs of neural networks. Also, the methods using combined data to exploit the advantage of each data are proposed. In this paper, back-propagation network(BPN) is used for high impedance fault detector and can use for high speed relay because it detects faults within 1 cycle.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.444-446
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• 1994

This paper describes the design of a digital multifunction controller for the intelligent high voltage customer switchboard and proposes a relaying algorithm for high impedance faults using back-propagation neural network. The hardware design uses the three microprocessors and global memory architecture to achive real time operation and control 4 feeders. The controller uses a 64-point radix-4 DIF FFT algorithm to measure the harmonic and relay parameters. Synthesized fault current waveforms are used to train and test the back - propagation network.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
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• pp.233-238
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• 1993

In this paper, two diagnosis algorithms using the simple fuzzy, cognitive map (FCM) that is an useful qualitative model are proposed. The first basic algorithm is considered as a simple transition of Shiozaki's signed directed graph approach to FCM framework. And the second one is an extended version of the basic algorithm. In the extension, three important concepts, modified temporal associative memory (TAM) recall, temporal pattern matching algorithm and hierarchical decomposition are adopted. As the resultant diagnosis scheme takes short computation time, it can be used for on-line fault diagnosis of large scale and complex processes that conventional diagnosis methods cannot be applied. The diagnosis system can be trained by the basic algorithm and generates FCM model for every experienced process fault. In on-line application, the self-generated fault model FCM generates predicted pattern sequences, which are compared with observed pattern sequences to declare the origin of fault. In practical case, observed pattern sequences depend on transport time. So if predicted pattern sequences are different from observed ones, the time weighted FCM with transport delay can be used to generate predicted ones. The fault diagnosis procedure can be completed during the actual propagation since pattern sequences of tvo different faults do not coincide in general.

• 전자공학회논문지
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• 제50권7호
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• pp.68-75
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• 2013

최근 이동 ad hoc 네트워크에 적합한 ID기반 암호시스템의 구현을 위한 Weil, Tate, Ate와 같은 페어링 연산 기법에서는 밀러 알고리듬이 사용된다. 페어링 연산의 활용 영역이 넓어짐에 따라 다양한 오류 공격이 제안되고 있으며, 그중 카운터 오류 공격이 가장 강력한 위협으로 여겨진다. 따라서 본 연구에서는 카운터 오류 공격에 대한 새로운 대응책을 제안한다. 제안 기법은 중간 값을 저장하는 위치를 랜덤하게 함으로써 오류에 의한 변형 가능성을 줄이고, if 구문에 의한 부채널 특성을 제거하여 오류 공격의 시도 자체를 어렵게 한다.

• 전자공학회논문지SC
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• 제37권5호
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• pp.34-45
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• 2000

이 논문에서는 부분관측하에서 직렬생산시스템에 대한 멀티에이젼트 내고장성 관리제어기법을 제안한다. 이를 위해 기존의 이산사건시스템에 대한 내고장성 관리제어기법에 멀티에이젼트 제어기법의 개념을 도입한다. 특히, 직렬연결된 프로세서 사이의 상호 내고장성 개념을 정립하며 제어결과의 상이정보를 이용한 관측불능 고장 식별에 관해 다룬다. 그리고 정립된 개념을 바탕으로 에이젼트 관리제어기의 설계기법을 정형화한다. 또한 제안하는 제어기법의 효용성을 검증하기 위해 폴리프로필렌의 예비중합공정과 중합공정에 있어서의 고장파급제어에 대한 사례연구를 살펴본다.

• 정보보호학회논문지
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• 제20권4호
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• pp.155-160
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• 2010

최근 오류주입 공격은 중국인의 나머지 정리(Chinese Remainder Theorem)를 이용한 RSA 암호 시스템(CRT-RSA)의 안전성에 심각한 위협이 되고 있다. 따라서 오류주입 공격에 강인한 대응 암호 알고리듬들이 개발되었고 다양한 오류 검사 방법이나 오류 확산을 이용한 대응책이 제시된 바 있다. 그러나 최근 Hur 등은 연산자 조작을 이용한 오류주입 공격 시 Kim 등이나 Ha 등이 제안한 알고리듬이 공격될 수 있다고 분석하였다. 본 논문에서는 이 연산자 조작 공격이 다정도(multi-precision) 연산을 하는 CRT-RSA 알고리듬에는 적용할 수 없으며 Kim 등이나 Ha 등이 제안한 알고리듬도 여전히 안전함을 밝히고자 한다.