• The Transactions of the Korea Information Processing Society
• /
• v.7 no.4
• /
• pp.1082-1091
• /
• 2000

In Distributed Shared Memory systems, false sharing occurs when two different data items, not shared but accessed by two different processors, are allocated to a single block and is an important factor in degrading system performance. The paper first analyzes shared memory allocation and reference patterns in parallel applications that allocate memory for shared data objects using a dynamic memory allocator. The shared objects are sequentially allocated and generally show different reference patterns. If the objects with the same size are requested successively as many times as the number of processors, each object is referenced by only a particular processor. If the objects with the same size are requested successively much more than the number of processors, two or more successive objects are referenced by only particular processors. On the basis of these analyses, we propose a memory allocation scheme which allocates each object requested by different processors to different pages and evaluate the existing memory allocation techniques for reducing false sharing faults. Our allocation scheme reduces a considerable amount of false sharing faults for some applications with a little additional memory space.

• Journal of Digital Contents Society
• /
• v.9 no.1
• /
• pp.77-86
• /
• 2008

False sharing is a result of co-location of unrelated data in the same unit of memory coherency, and is one source of unnecessary overhead being of no help to keep the memory coherency in multiprocessor systems. Moreover, the damage caused by false sharing becomes large in proportion to the granularity of memory coherency. To reduce false sharing in page-based DSM systems, it is necessary to allocate unrelated data objects that have different access patterns into the separate shared pages. In this paper we propose sized and call-site tracing-based shared memory allocator, shortly SCSTallocator. SCSTallocator places each data object requested from the different call-sites into the separate shared pages, and at the same time places each data object that has different size into different shared pages. Consequently data objects that have the different call-site and different object size prohibited from being allocated to the same shared page. Our observations show that our SCSTallocator outperforms the existing dynamic shared memory allocators. By combining the two existing allocation technique, we can reduce a considerable amount of false sharing misses.

• Korean Journal of Cognitive Science
• /
• v.18 no.2
• /
• pp.113-138
• /
• 2007

The effects of schema on accurate and false memories of items in a scene were investigated in two experiments: Recognition of items in a scene was tested immediately in Experiment 1 and three days later in Experiment 2. In both experiments, the following three variables were manipulated: Exposure time (250ms or 10000ms), picture mode (completed pictures or scrambled pictures), and manipulation mode (missing item or substituted item). Experiment 1 had yielded three important results: First, although accurate memory for presented items got increased when the exposure time was longer, false memory of the critical lures was not changed. Second, false memory of critical lures in the missing condition, where there was not any conflict between verbatim information and gist information, was higher than that of the substituted condition, where verbatim information of the item that replaced the lure was in conflict with the gist information. Third, accurate memory for atypical items in the substituted rendition, which had replaced the critical lures and in conflict with the schema, was higher than that in the missing condition. In Experiment 2, recognition test were administered 72 hours after the participants saw the picture. The three effects mentioned in Experiment 1 had disappeared in Experiment 2. The results of Experiment 2 might be due to the selective weakening of verbatim information compared to the persistence of the gist (or schematic) information. The results of Experiments 1 and 2 showed that false memory of critical lures is more persistent than the accurate memory of non-critical information. Theoretical implications of the results were considered in terms of the function of the verbatim and gist information.

• Journal of KIISE:Computer Systems and Theory
• /
• v.27 no.4
• /
• pp.383-393
• /
• 2000

In shared memory multiprocessor systems, false sharing occurs when several independent data objects, not shared but accessed by different processors, are allocated to the same coherency unit of memory. False sharing is one of the major factors that may degrade the performance of memory coherency protocols. This paper presents a new shared memory allocation scheme to reduce false sharing of parallel applications where master processor controls allocation of all the shared objects. Our scheme allocates the objects to temporary address space for the moment, and actually places each object in the address space of processor that first accesses the object later. Its goal is to allocate independent objects that may have different access patterns to different pages. We use execution-driven simulation of real parallel applications to evaluate the effectiveness of our scheme. Experimental results show that by using our scheme a considerable amount of false sharing faults can be reduced with low overhead.

• Journal of KIISE:Computer Systems and Theory
• /
• v.32 no.7
• /
• pp.349-358
• /
• 2005

False sharing is a result of co-location of unrelated data in the same unit of memory coherency, and is one source of unnecessary overhead being of no help to keep the memory coherency in multiprocessor systems. Moreover. the damage caused by false sharing becomes large in proportion to the granularity of memory coherency. To reduce false sharing in a page-based DSM system, it is necessary to allocate unrelated data objects that have different access patterns into the separate shared pages. In this paper we propose call-site tracing-based shared memory allocator. shortly CSTallocator. CSTallocator expects that the data objects requested from the different call-sites may have different access patterns in the future. So CSTailocator places each data object requested from the different call-sites into the separate shared pages, and consequently data objects that have the same call-site are likely to get together into the same shared pages. We use execution-driven simulation of real parallel applications to evaluate the effectiveness of our CSTallocator. Our observations show that by using CSTallocator a considerable amount of false sharing misses can be additionally reduced in comparison with the existing techniques.

• Korean Journal of Cognitive Science
• /
• v.19 no.1
• /
• pp.17-39
• /
• 2008

The present study was conducted to provide Korean word association lists for adults and children which are needed in research area of false memory. Associated words, asso[iation strength, and the proportion of cue set size to the total number of associated words produced through the discrete association technique were compared between the two groups. The data showed that associated words with high strength wert same or similar but associated words with lower strength were various in the two groups. The result that adults produced larger proportion of cue set size than children suggests that adults have more typical and more convergent semantic network than children. The present data will be served as a database useful for the studies to investigate cognitive functions in memory and other related area.

• IEIE Transactions on Smart Processing and Computing
• /
• v.4 no.3
• /
• pp.163-168
• /
• 2015

Many IP address lookup approaches employ Bloom filters to obtain a high-speed search performance. Especially, it has been recently studied that the search performance of trie-based algorithms can be significantly improved by adding Bloom filters. In such algorithms, the number of trie accesses can be greatly reduced because Bloom filters can determine whether a node exists in a trie without actually accessing the trie. Bloom filters do not have false negatives but have false positives. False positives can lead to unnecessary trie accesses. The false positive rate must thus be reduced to enhance the performance of lookup algorithms applying Bloom filters. One important characteristic of trie-based algorithms is that all the ancestors of a node are also stored. The proposed algorithm utilizes this characteristic in reducing the false positive rate of a Bloom filter without increasing the size of the memory for the Bloom filter. When a Bloom filter produces a positive result for a node of a trie, we propose to check whether the ancestors of the node are also positives. Because Bloom filters have no false negatives, the negatives of any of the ancestors mean that the positive of the node is false. In other words, we propose to use more Bloom filter queries to reduce the false positive rate of a Bloom filter in trie-based algorithms. Simulation results show that querying one ancestor of a node can reduce the false positive rate by up to 67% with exactly the same architecture and the same memory requirement. The proposed approach can be applied to other trie-based algorithms employing Bloom filters.

• Journal of the Korea Society of Computer and Information
• /
• v.24 no.2
• /
• pp.139-147
• /
• 2019

A false alarm, which is an incorrect report of an emergency, could trigger an unnecessary action. The predictive maintenance framework developed in our previous work has a feature whereby a machine alarm is triggered based on sensor data evaluation. The sensor data evaluator performs three essential evaluation steps. First, it evaluates each sensor data value based on its threshold (lower and upper bound) and labels the data value as "alarm" when the threshold is exceeded. Second, it calculates the duration of the occurrence of the alarm. Finally, in the third step, a domain expert is required to assess the results from the previous two steps and to determine, thereby, whether the alarm is true or false. There are drawbacks of the current evaluation method. It suffers from a high false-alarm ratio, and moreover, given the vast amount of sensor data to be assessed by the domain expert, the process of evaluation is prolonged and inefficient. In this paper, we propose a method for automatic false-alarm labeling that mimics how the domain expert determines false alarms. The domain expert determines false alarms by evaluating two critical factors, specifically the duration of alarm occurrence and identification of anomalies before or while the alarm occurs. In our proposed method, Hierarchical Temporal Memory (HTM) is utilized to detect anomalies. It is an unsupervised approach that is suitable to our main data characteristic, which is the lack of an example of the normal form of sensor data. The result shows that the technique is effective for automatic labeling of false alarms in sensor data.

• Journal of KIISE:Software and Applications
• /
• v.36 no.7
• /
• pp.590-606
• /
• 2009

We present a static analyzer that detects memory leaks in C programs. It achieves relatively high accuracy at a relatively low cost on SPEC2000 benchmarks and several open-source software packages, demonstrating its practicality and competitive edge against other reported analyzers: for a set of benchmarks totaling 1,777 KLOCs, it found 332 bugs with 47 additional false positives (a 12.4% false-positive ratio), and the average analysis speed was 720 LOC/sec. We separately analyze each procedure's memory behavior into a summary that is used in analyzing its call sites. Each procedural summary is parameterized by the procedure's call context so that it can be instantiated at different call sites. What information to capture in each procedural summary has been carefully tuned so that the summary should not lose any common memory-leak-related behaviors in real-world C program. Because each procedure is summarized by conventional fixpoint iteration over the abstract semantics ('a la abstract interpretation), the analyzer naturally handles arbitrary call cycles from direct or indirect recursive calls.

• Journal of KIISE
• /
• v.42 no.4
• /
• pp.442-450
• /
• 2015

This paper proposes a method for reducing false conflicts in signature-based eager hardware transactional memory (HTM). The method tracks the information on all cache blocks that are accessed by a transaction. If the information provides evidence that there are no conflicts for a given transactional request from another core, the method prevents the occurrence of a false conflict by forcing the HTM to ignore the decision based on the signature. The method is very effective in reducing false conflicts and the associated unnecessary transaction stalls and aborts, and can be used to improve the performance of the multicore processor that implements the signature-based eager HTM. When running the STAMP benchmark on a 16-core processor that implements the LogTM-SE, the increased speed (decrease in execution time) achieved with the use of the method is 20.6% on average.