• Title/Summary/Keyword: fabrication process

Search Result 4,367, Processing Time 0.033 seconds

Rational Design and Facile Fabrication of Tunable Nanostructures towards Biomedical Applications

  • Yu, Eun-A;Choe, Jong-Ho;Park, Gyu-Hwan
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2016.02a
    • /
    • pp.105.2-105.2
    • /
    • 2016
  • For the rational design and facile fabrication of novel nanostructures, we present a new approach to generating arrays of three-dimensionally tunable nanostructures by exploiting light-matter interaction. To create controlled three-dimensional (3D) nanostructures, we utilize the 3D spatial distribution of light, induced by the light-matter interaction, within the matter to be patterned. As a systematic approach, we establish 3D modeling that integrates the physical and chemical effects of the photolithographic process. Based on a comprehensive analysis of structural formation process and nanoscale features through this modeling, we are able to realize three-dimensionally tunable nanostructures using facile photolithographic process. Here we first demonstrate the arrays of three-dimensionally controlled, stacked nanostructures with nanoscale, tunable layers. We expect that the promising strategy would open new opportunities to produce the arrays of tunable 3D nanostructures using more accessible and facile fabrication process for various biomedical applications ranging from biosensors to drug delivery devices.

  • PDF

Production Scheduling in Semiconductor Wafer Fabrication Process (반도체 Wafer Fabrication 공정에서의 생산일정계획)

  • Lee, Koon-Hee;Hong, Yu-Shin;Kim, Soo-Young
    • Journal of Korean Institute of Industrial Engineers
    • /
    • v.21 no.3
    • /
    • pp.357-369
    • /
    • 1995
  • Wafer fabrication process is the most important and critical process in semiconductor manufacturing. The process is very complicated and hard to establish an efficient schedule due to its complexity. Furthermore, several performance indices such as due dates, throughput, cycle time and workstation utilizations are to be considered simultaneously for an efficient schedule, and some of these indices have negative correlations in performances each other. We develop an efficient heuristic scheduling algorithm; Hybrid Input Control Policy and Hybrid Dispatching Rule. Through numerical experiments, it is shown that the proposed Hybrid Scheduling Algorithm gives better performance compared with existing algorithms.

  • PDF

A study of proton exchange method for optical waveguide fabrication (광 도파로 제작을 위한 양자 교환 방식에 관한 연구)

  • Yoon, Hyung-Do;Chae, Kee-Byung;Kang, Ki-Sung;Soh, Dae-Wha
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1992.11a
    • /
    • pp.106-109
    • /
    • 1992
  • In this study, a single optical modulator which is fabricated on X-cut $LiNbO_3$ substrate by using proton exchange method is described. It is well-known that the proton exchange method is characterized by index change of the single optical modulator. As a results, it is found that the single optical waveguide varied widely with controlling diffusion process. The diffusion process was used to optimize the fabrication of the single optical modulator. On the other hand, the process was used to provide another performance improvement and it reduced the fabrication process.

  • PDF

ANALYSIS OF THE PROCESS OF FABRICATION OF STEEL STRUCTURES USING AN AUTOMATIC CONSTRUCTION SYSTEM

  • Hak-Ju Lee;Yoonseok Shin;Wi Sung Yoo;Hunhee Cho;Kyung-In Kang
    • International conference on construction engineering and project management
    • /
    • 2009.05a
    • /
    • pp.1081-1087
    • /
    • 2009
  • An automatic construction system in Korea is now at the stage of the full automation like in Japan, and an actual pilot project is going to be built in 2009. However, in developing a new construction system that has never been implemented before, there is a need to assess the performance and to consider the uncertainty of the system. The program evaluation and review technique (PERT) allows dealing with this uncertainty. Thus, this paper implements an analysis of the process of steel fabrication and makes suggestions for time-related problems arising from the analysis. The time required for steel erection by the automatic system was compared with that in the traditional method. In the result, finding out another construction process and improving robot performance were proposed to resolve the problems. The results will contribute to promoting the development of an efficient system for the new automatic construction system.

  • PDF

Development of a Simulator for Optimizing Semiconductor Manufacturing Incorporating Internet of Things (사물인터넷을 접목한 반도체 소자 공정 최적화 시뮬레이터 개발)

  • Dang, Hyun Shik;Jo, Dong Hee;Kim, Jong Seo;Jung, Taeho
    • Journal of the Korea Society for Simulation
    • /
    • v.26 no.4
    • /
    • pp.35-41
    • /
    • 2017
  • With the advances in Internet over Things, the demand in diverse electronic devices such as mobile phones and sensors has been rapidly increasing and boosting up the researches on those products. Semiconductor materials, devices, and fabrication processes are becoming more diverse and complicated, which accompanies finding parameters for an optimal fabrication process. In order to find the parameters, a process simulation before fabrication or a real-time process control system during fabrication can be used, but they lack incorporating the feedback from post-fabrication data and compatibility with older equipment. In this research, we have developed an artificial intelligence based simulator, which finds parameters for an optimal process and controls process equipment. In order to apply the control concept to all the equipment in a fabrication sequence, we have developed a prototype for a manipulator which can be installed over an existing buttons and knobs in the equipment and controls the equipment communicating with the AI over the Internet. The AI is based on the deep learning to find process parameters that will produce a device having target electrical characteristics. The proposed simulator can control existing equipment via the Internet to fabricate devices with desired performance and, therefore, it will help engineers to develop new devices efficiently and effectively.

Fabrication of Triode Type Field Emission Device Using Carbon Nanotubes Synthesized by Thermal Chemical Vapor Deposition (열 화학 기상 증착법을 이용한 삼극관 구조의 탄소 나노 튜브 전계 방출 소자의 제조)

  • Yu W. J.;Cho Y. S.;Choi G. S.;Kim D. J.
    • Korean Journal of Materials Research
    • /
    • v.14 no.8
    • /
    • pp.542-546
    • /
    • 2004
  • We report a new fabrication process for high performance triode type CNT field emitters and their superior electrical properties. The CNT-based triode-type field emitter structure was fabricated by the conventional semiconductor processes. The keys of the fabrication process are spin-on-glass coating and trim-and-leveling of the carbon nanotubes grown in trench structures by employing a chemical mechanical polishing process. They lead to strong adhesion and a uniform distance from the carbon nanotube tips to the electrode. The measured emission property of the arrays showed a remarkably uniform and high current density. The gate leakage current could be remarkably reduced by coating of thin $SiO_{2}$ insulating layer over the gate metal. The field enhancement factor(${\beta}$) and emission area(${\alpha}$) were calculated from the F-N plot. This process can be applicable to fabrication of high power CNT vacuum transistors with good electrical performance.

Fabrication of SiCN microstructures for super-high temperature MEMS using photopolymerization and its characteristics (광중합에 의한 초고온 MEMS용 SiCN 미세구조물 제작과 그 특성)

  • Chung, Gwiy-Sang
    • Journal of Sensor Science and Technology
    • /
    • v.15 no.2
    • /
    • pp.148-152
    • /
    • 2006
  • This paper describes the fabrication of SiCN microstructures for super-high temperature MEMS using photopolymerization of pre-ceramic polymer. In this work, polysilazane liquide as a precursor was deposited on Si wafers by spin coating, microstructured and solidificated by UV lithography, and removed from the substrate. The resulting solid polymer microstructures were cross-linked under HIP process and pyrolyzed to form a ceramic of withstanding over $1400^{\circ}C$. Finally, the fabricated SiCN microstructures were annealed at $1400^{\circ}C$ in a nitrogen atmosphere. Mechanical characteristics of the SiCN microstructure with different fabrication process conditions were evaluated. The elastic modules, hardness and tensile strength of the SiC microstructure implemented under optimum process condtions are 94.5 GPa, 10.5 GPa and 11.7 N/min, respectively. Consequently, the SiCN microstructure proposed in this work is very suitable for super-high temperature MEMS application due to very simple fabrication process and the potential possiblity of sophisticated mulitlayer or 3D microstructures as well as its good mechanical properties.

The Fabrication Processes for the Planarization of Sacrificial Layers over Hollow Structures (Hollow Structure에서의 희생층 평탄화 제작 공정)

  • Yoon Yong-Seop;Bae Ki-Deok;Choi Hyung;Jun Chan-Bong;Ro Kwang-Choon
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.53 no.10
    • /
    • pp.546-550
    • /
    • 2004
  • Two fabrication approaches are proposed to planarize the sacrificial layer over hollow structures. One is the photoresist filling method that makes use of photolithography, thermal curing and plasma ashing. The other is the lamination method that is applying pressure and temperature to the organic film over the hollow structures. The fabrication results are compared with those of CMP process. Trenches and cavities with various dimensions have been made for the porposed process. Upon measuring the planarization levels, they are dependent on planarization methods and the geometrical size of hollow structures. The photoresist filling method is so strongly dependent on the width and depth of trenches that we have problems to use it for large dimensional trenches. To the contrary, the flatness of sacrificial layer over the trenches was found to be almost independent of trench dimensions for the lamination method. A CMP process shows the most excellent results, but the fabrication is complicated and the access to it is not so easy. It is important to choose the proper planarization method by considering the required flatness levels, materials to be planarized, and connection between the planarization step and the previous or the following process of it.

Automatioc Density Measurement System Using Optical Lens in High Speed Textile Fabrication Process (고속의 직물 제직 공정에서 광학적 렌즈를 이용한 자동 밀도 측정 시스템)

  • Lee, Eung-Joo;Hyun, Eung-Joo;Jeong, In-Gab
    • The Transactions of the Korea Information Processing Society
    • /
    • v.5 no.1
    • /
    • pp.111-118
    • /
    • 1998
  • The density of fabric is a very important parameter in many fabric production processes. However, in the textile fabrication factories, textile density measurement process has been done inefficiently by handicraft. Thus, exact textile density measurement process is necessary to fabricate high quality textile through weft straighten. In this paper, we propose an automatic textile density measurement system to measure textile density automatically and to improve fabrication efficiency. The proposed system uses cylindrical lens to optically scan the weftl information of the fabric as well as convex lens to enlarge the weft images. The proposed system improves textile quality and provides constant density value to the whole textile range in the high speed fabrication process.

  • PDF

Polymer master fabrication for antireflection using low-temperature AAO process (저온 양극산화공정을 이용한 반사 방지용 폴리머 마스터 제작)

  • Shin, Hong-Gue;Kwon, Jong-Tae;Seo, Young-Ho;Kim, Byeong-Hee;Park, Chang-Min;Lee, Jae-Suk
    • Proceedings of the KSME Conference
    • /
    • 2008.11a
    • /
    • pp.1825-1828
    • /
    • 2008
  • A simple method for the fabrication of porous nano-master for antireflective surface is presented. In conventional fabrication methods for antireflective surface, coating method with low refractive index has usually been used. However, it is required to have high cost and long times for mass production. In this paper, we suggested the fabrication method of antireflective surface by the hot embossing process using the porous nano patterned master on silicon wafer fabricated by low-temperature anodic aluminum oxidation. Through multi-AAO and etching processes, nano patterned master with high aspect ratio was fabricated at the large area. Pore diameter and inter-pore distance are about 150nm and from 150 to 200nm. In order to replicate anti-reflective structure, hot embossing process was performed by varying the processing parameters such as temperature, pressure and embossing time etc. Finally, antireflective surface can be successfully obtained after etching process to remove selectively silicon layer of AAO master.

  • PDF