• KIEAE Journal
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• v.14 no.2
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• pp.21-28
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• 2014

This paper provides the up to date review of the shading effects on PV module performance and the associated detection algorithm related to the maximum power point tracking. It includes the brief explanations of the MMP variations due to the shading occurrence on the PV modules. Review of experimental and simulation studies highlighting the significant impacts of shading on PV efficiencies were presented. The literature indicates that even the partial shading of a single cell can greatly drop the entire module voltage and power efficiency. The MMP tracking approaches were also reviewed in this study. Both conventional and advanced soft computing methods such as ANN, FLC and EA were described for the proper tracking of MMP under shaded conditions. This paper would be the basic source and the comprehensive information associated with the shading effects and relevant MPP tracking technique.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.319-322
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• 1999

This paper presents a novel single-stage Power Factor Corrected(PFC) AC/DC forward converter with semi-automatic current shaping in order to achieve the unity power factor and an isolated output. Since the proposed circuit is combined a boost converter used for PFCs with a forward converter used for DC to DC conversion, the over-all size of system could be reduced. And thanks to the zero voltage switching(ZVS) in both switches, the voltage stress can be reduced considerably. A simple auxiliary circuit adopted into the secondary of transformer is composed of lossless components for reducing surge voltage. A prototype which has tow IGBT(Insulated Gate Bypolar Transistor) modules as switching device is manufactured to evaluate the proposed topology. The characteristics of the proposed circuit are tested, and the validity is verified by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.223-231
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• 2015

LEDs have been widely used in lighting displays, automobiles, and airplanes owing to their excellent light output characteristics and long lifespan. Though LEDs are manufactured under the same process, variations in impurity concentrations cause electrical deviation among LEDs. The resulting electrical deviation can not only reduce the life time of the LED but also cause non-uniform luminance of LEDs connected in parallel. LED driving circuit is required to solve these problems. In this paper, we propose a LED driving system using Y-type current balancing transformer to maximize the efficiency of the system by removing output stage Schottky diodes. Experimental results are presented to verify the performance of proposed LED driving system that is applied to 80 W LED modules.

• Journal of Power Electronics
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• v.10 no.3
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• pp.245-250
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• 2010

Input-series-output-parallel (ISOP) converters consisting of multiple modular DC/DC converters can enable low voltage rating switches to be used under high voltage input applications. This paper presents a digital control strategy, which can achieve equal sharing of input voltage for a modular ISOP system consisting of two-transistor forward DC/DC converters by forcing the input voltages of neighboring modules to be equal. The proposed scheme is analyzed using small signals analysis based on the state space average method. The performance of the proposed control strategy is verified with an experimental prototype of an ISOP converter made up of three two-switch forward converters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.6A
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• pp.526-534
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• 2005

This paper presents the structure and function of the system which automatically generates embedded processor cores using the SMDL. Accepting processor description in the SDML, the proposed system generates the processor core, consisting of the pipelined datapath and memory modules together with their control unit. The generated cores support muti-cycle instructions for proper handling of memory accesses, and resolve pipeline hazards encountered in the pipelined processors. Experimental results show the functional accuracy of the generated cores.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.517-519
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• 2005

In this paper, we consider a digital protection IED(Intelligent Electric Device) for a distributed power system. The IED can measure various elements for protection and communicate with another devices through network. The protection IED is composed of specific function modules: signal process module which converts analog signal from PT and CT handle algorithm to digital one; communication module for connection with another IEDs; input/output module for user-interfaces. A general purpose DSP board with TMS320C2812 is used in the IED. In order to verify the proposed IED, experimental researches with the power system simulator DOBLE has been carried out for a phase earth fault. The results show an under-voltage relaying algorithm has been realized sucessfully in the hardware system.

• Proceedings of the KIEE Conference
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• 2003.07e
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• pp.140-143
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• 2003

In order to improve the system utility efficiency of energy conversion, it is desirable to operate the PV system at maximum power point of solar cell under versable condition. This paper describes the experimental results of the PV system that contains a solar modules and DC-DC converter(boost type chopper). The Simulation results show that the PV system always operate at maximum power point of solar cells having stabilize output voltage waveform with relatively small ripple component.

• Proceedings of the KIEE Conference
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• 2009.04a
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• pp.163-165
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• 2009

Many photovoltaic (PV) systems are being developed and installed. For a PV developer, simulations are required before the experimental testing. However, most simulation tools do not offer data libraries for PV systems, so that some Institutes who try to use such software will be in difficulty. In this paper, simulations of performance and stability have been carried out using the software PSPICE. In this paper, the modelling of solar cell arrays, photovoltaic modules, PV generators, batteries and drive systems is carried out based on mathematical equivalence circuits and available data, and the models are converted into a data library for PSPICE that is user friendly. System variations can be modeled by simple parameter variation. To verify the accuracy of the simulation library, various models were run and compared to known systems.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.499-500
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• 2008

In this paper, we design and implement the monolithic power factor correction IC for system power modules using a high voltage(50V) CMOS process. The power factor correction IC is designed for power applications, such as refrigerator, air-conditioner, etc. It includes low voltage logic, 5V regulator, analog control circuit, high-voltage high current output drivers, and several protection circuits. And also, the designed IC has standby detection function which detects the output power of the converter stage and generates system down signal when load device is under the standby condition. The simulation and experimental results show that the designed IC acts properly as power factor correction IC with efficient protective functions.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.6
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• pp.91-103
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• 1995

This paper presents the design of a performance-driven interconnect allocation algorithm. The algorithm is based on the idea that the clock period can be minimized by balancing the load for each of the communication paths following specific hardware modules. By performing load balancing for only the communication lines on ciritical paths, the proposed algorithm generates interconnection structures with minimum delays. This approach also shows run time efficiency. Experimental results confirm the effectiveness of the algorithm by constructing the interconnection structures such that the clock period can be minimized for several benchmark circuits available from the literature.