• Title/Summary/Keyword: etching mask

Search Result 233, Processing Time 0.03 seconds

Anisotropic Silicon Etching Using $RuO_2$ Thin Film as a Mask Layer by TMAH Solution ($RuO_2$를 마스크 층으로 TMAH에 의한 이방성 실리콘 식각)

  • 이재복;오세훈;홍경일;최덕균
    • Journal of the Korean Ceramic Society
    • /
    • v.34 no.10
    • /
    • pp.1021-1026
    • /
    • 1997
  • RuO2 thin film has reasonably good conductivity and stiffness and it is thought to substitute for the cantilever beam made up of Pt and Si3N4 double layers in microactuators. Therefore, anisotopic Si etching was performed using RuO2 thin film as a mask layer in 25 wt. % TMAH water solution. In the etching temperature ranging from 6$0^{\circ}C$ to 75$^{\circ}C$, the etch rates of all the crystallographic directions increased linearly as the etching temperature increased. The etch rate ratio(selectivity) of [111]/[100] which varied from 0.08 to 0.14, was not sensitive to temperature. The activation energies for [110] direction, [100] direction and [111] direction were 0.50, 0.66 and 1.04eV, respectively. RuO2 cantilever beam with a clean surface was formed at the etching temperatures of 6$0^{\circ}C$ and $65^{\circ}C$. But the damages due to formation of pin holes on RuO2 surface were observed beyond 7$0^{\circ}C$. The tensile stress of RuO2 thin films caused the cantilever bending upward. As a result, it was demonstrated that the formation of conducting oxide RuO2 cantilever beam which can replace the role of an electrode and supporting layer could be possible by TMAH solution.

  • PDF

The Effect of Mask Patterns on Microwire Formation in p-type Silicon (P-형 실리콘에서 마이크로 와이어 형성에 미치는 마스크 패턴의 영향)

  • Kim, Jae-Hyun;Kim, Kang-Pil;Lyu, Hong-Kun;Woo, Sung-Ho;Seo, Hong-Seok;Lee, Jung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.11a
    • /
    • pp.418-418
    • /
    • 2008
  • The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

  • PDF

Silicon microstructure prepared by a dry etching (Dry Etching에 의해 제작된 실리콘 미세 구조물)

  • 홍석민;임창덕;조정희;안일신;김옥경
    • Journal of the Korean Vacuum Society
    • /
    • v.6 no.3
    • /
    • pp.242-248
    • /
    • 1997
  • Porous silicons were prepared by dry etching as well as by chemical etching. The latter is a conventional method used by many researchers. Meanwhile, the former is a new method we developed. Also the porous silicon structure was made by E-beam lithography technique. However, due to the limit of this technique, minimum size we could produce was about 0.3 $\mu\textrm{m}$ in diameter on silicon wafer. In a new method, the porous silicon microstructure was fabricated by using Reactive Ion Etching method after covering with diamond powder on 4 inch wafer by using spin coater. In this method, diamond powder acted as a mask. The morphology of samples prepared under many different conditions were analysed be SEM and AFM. And we measured PL spectra for the samples. Based on these results, we observed the structure of a few hundreds $\AA$ in size from porous silicon which was made by dry etching with diamond powder. Also the PL peak for these samples lied around 590 nm compared to 760 nm for chemically etched porous silicon.

  • PDF

Low-Loss Compact Arrayed Waveguide Grating with Spot-Size Converter Fabricated by a Shadow-Mask Etching Technique

  • Jeong, Geon;Kim, Dong-Hoon;Choi, Jun-Seok;Lee, Dong-Hwan;Park, Mahn-Yong;Kim, Jin-Bong;Lee, Hyung-Jong;Lee, Hyun-Yong
    • ETRI Journal
    • /
    • v.27 no.1
    • /
    • pp.89-94
    • /
    • 2005
  • This paper describes a low-loss, compact, 40-channel arrayed waveguide grating (AWG) which utilizes a monolithically integrated spot-size converter (SSC) for lowering the coupling loss between silica waveguides and standard single-mode fibers. The SSC is a simple waveguide structure that is tapered in both the vertical and horizontal directions. The vertically tapered structure was realized using a shadow-mask etching technique. By employing this technique, the fabricated, 40-channel, 100 GHz-spaced AWG with silica waveguides of 1.5% relative index-contrast showed an insertion-loss figure of 2.8 dB without degrading other optical performance.

  • PDF

fabrication of the Microfluidic LOC System with Photodiode (광 다이오드를 가진 Microfluidic LOC 시스템 제작)

  • 김현기;신경식;김용국;이상렬;김태송;양은경;주병권
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.16 no.12
    • /
    • pp.1097-1102
    • /
    • 2003
  • In this paper, we used only PR as etching mask, while it used usually Cr/AU as etching mask, and in order to fabricate a photosensor has the increased sensitivity, we investigated on the sensitivity of general type and p-i-n type diode. we designed microchannel size width max 10um, min 5um depth max 10um, reservoir size max 100um, min 2mm. Fabrication of microfluidic devices in glass substrate by glass wet etching methods and glass to glass fusion bonding. The p-i-n diode has higher sensitivity than photodiode, Considering these results, we fabricated p-i-n diodes on the high resistive(4㏀$.$cm) wafer into rectangle and finger pattern and compared internal resistance of each pattern. The internal resistance of pin diode can be decreased by the application of finger pattern has parallel resistance structure from 571Ω to 393Ω.

이온소스 Cathode 형태가 이온 빔에 미치는 영향

  • Min, Gwan-Sik;Lee, Seung-Su;Yun, Ju-Yeong;Jeong, Jin-Uk;O, Eun-Sun;Hwang, Yun-Seok;Kim, Jin-Tae
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2014.02a
    • /
    • pp.145.1-145.1
    • /
    • 2014
  • 변형된 end-Hall type의 이온 소스를 사용하여 이온 소스의 형태에 따라 달라지는 이온 빔의 변화를 측정하였다. 이온 소스 cathode의 wehnelt mask를 세 가지 종류로 제작하였으며, 생성된 이온 빔을 이용하여 Al이 sputter 방식으로 증착된 유리 기판을 etching 하였다. 실험 결과 wehnelt mask의 모양에 따라 focus, broad, strate의 형태로 이온 빔이 생성되는 것을 확인하였다. Al이 증착된 유리 기판의 제작을 위하여 Al target을 사용하여 RF power로 150 W, 2분간 sputtering을 하였고, 이온 소스와 기판사이의 거리를 1 cm씩 증가시켜가며 이온 빔을 2,500 V로 3분간 유리 기판을 etching한 후, 유리 기판이 etching된 모양을 통해 이온 빔의 형태를 분석하였다. 본 연구를 위하여 sputtering과 이온 빔 처리가 가능한 챔버를 제작하였으며, scroll pump와 turbo molecular pump를 사용하였다. Base pressure $1.5{\times}10^{-6}Torr$에서 실험이 진행되었고, 불활성 기체 Ar을 사용하였다. Ar 기체를 주입시 pressure는 $2.6{\times}10^{-3}Torr$였다.

  • PDF

Development of New Etching Algorithm for Ultra Large Scale Integrated Circuit and Application of ICP(Inductive Coupled Plasma) Etcher (초미세 공정에 적합한 ICP(Inductive Coupled Plasma) 식각 알고리즘 개발 및 3차원 식각 모의실험기 개발)

  • 이영직;박수현;손명식;강정원;권오근;황호정
    • Proceedings of the IEEK Conference
    • /
    • 1999.06a
    • /
    • pp.942-945
    • /
    • 1999
  • In this work, we proposed Proper etching algorithm for ultra-large scale integrated circuit device and simulated etching process using the proposed algorithm in the case of ICP (inductive coupled plasma) 〔1〕source. Until now, many algorithms for etching process simulation have been proposed such as Cell remove algorithm, String algorithm and Ray algorithm. These algorithms have several drawbacks due to analytic function; these algorithms are not appropriate for sub 0.1 ${\mu}{\textrm}{m}$ device technologies which should deal with each ion. These algorithms could not present exactly straggle and interaction between Projectile ions and could not consider reflection effects due to interactions among next projectile ions, reflected ions and sputtering ions, simultaneously In order to apply ULSI process simulation, algorithm considering above mentioned interactions at the same time is needed. Proposed algorithm calculates interactions both in plasma source region and in target material region, and uses BCA (binary collision approximation4〕method when ion impact on target material surface. Proposed algorithm considers the interaction between source ions in sheath region (from Quartz region to substrate region). After the collision between target and ion, reflected ion collides next projectile ion or sputtered atoms. In ICP etching, because the main mechanism is sputtering, both SiO$_2$ and Si can be etched. Therefore, to obtain etching profiles, mask thickness and mask composition must be considered. Since we consider both SiO$_2$ etching and Si etching, it is possible to predict the thickness of SiO$_2$ for etching of ULSI.

  • PDF

A Stdudy on SUS MASK Etching using of FeCl3 (FeCl3를 이용한 SUS MASK 에칭에 관한 연구)

  • Lee, Woo-Sik
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.13 no.5
    • /
    • pp.412-418
    • /
    • 2020
  • This paper produced an automatic fluid management system that can accurately control the specific gravity of etching solution(FeCl3), and produced a SUS MASK applied to OLED. The target was set at 0.4 mm in diameter of the hole. As a result of this misconception, the etching speed increased when the specific gravity(S.G) value of FeCl3 was changed from 1.43 to 1.49. And when the weight was 1.49, it was found that the vertical diameter was 0.405 mm, approaching the target. When pressure injection was varied from 2.0kg/cm2 to 3.5kg/cm2, the hole diameter at 3.0 kg/cm2 averaged 0.4mm, matching the target. The characteristics of the change in gravity were analyzed by applying the additive 1.2% and setting the weight at 1.430 by mixing HCl and H2O in FeCl3 and fixing the injection pressure at 3.0 kg/cm2. When the weight changed from 1.460 to 1.469 the etching speed increased from 0.564 to 0.540. When the weight was 1.467, the hole diameter was measured at 0.4 mm and the target was reached.