• Title/Summary/Keyword: etching mask

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Large-Scale Assembly of Aligned Graphene Nanoribbons with Sub 30-nm Width

  • Kim, Taekyeong
    • Journal of the Korean Chemical Society
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    • v.58 no.6
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    • pp.524-527
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    • 2014
  • We report a simple yet efficient method to assemble large-scale aligned graphene nanoribbons (GNRs) with a width as small as 30 nm. The $V_2O_5$ nanowires (NWs) were aligned on a graphene surface via spraying a solution of the $V_2O_5$ NWs, and the graphene was selectively etched by the reactive ion etching method using the $V_2O_5$ NWs as a shadow mask. This process allowed us to prepare large scale patterns of the aligned GNRs on a $SiO_2$ substrate. The orientation of the aligned and randomly oriented GNRs was compared by the atomic force microscope (AFM) images. We achieved the highly aligned GNRs along the flow direction of the $V_2O_5$ NWs solution. Furthermore, we successfully fabricated a field effect-transistor with the aligned GNRs and measured its electrical properties. Since our method enable to prepare the aligned GNRs over a large area, it should open up new way for the various applications.

Analysis of Electrical Characteristics of High-Density Trench Gate Power DMOSFET Utilizing Self-Align and Hydrogen Annealing Techniques (자기 정열과 수소 어닐링 기술을 이용한 고밀도 트랜치 게이트 전력 DMOSFET의 전기적 특성 분석)

  • 박훈수;김종대;김상기;이영기
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.10
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    • pp.853-858
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    • 2003
  • In this study, a new simplified technology for fabricating high density trench gate DMOSFETs using only three mask layers and TEOS/nitride spacer is proposed. Due to the reduced masking steps and self-aligned process, this technique can afford to fabricate DMOSFETs with high cell density up to 100 Mcell/inch$^2$ and cost-effective production. The resulting unit cell pitch was 2.3∼2.4${\mu}$m. The fabricated device exhibited a excellent specific on-resistance characteristic of 0.36m$\Omega$. cm$^2$ with a breakdown voltage of 42V. Moreover, time to breakdown of gate oxide was remarkably increased by the hydrogen annealing after trench etching.

Fabrication of Depth-probe type Silicon Microelectrode array for Neural signal Recording (신경신호기록용 탐침형 반도체 미세전극 어레이의 제작)

  • Yoon, T.H.;Hwang, E.J.;Shin, D.Y.;Kim, S.J.
    • Proceedings of the KOSOMBE Conference
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    • v.1998 no.11
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    • pp.147-148
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    • 1998
  • In this paper, we developed the process for depth-probe type silicon microelectrode arrays. The process consists of four mask steps only. The steps are for defining sites, windows, and for shaping probe using plasma etch from above, and for shaping using wet etch from below, respectively. The probe thickness is controlled by dry etching, not by impurity diffusion. We used gold electrodes with a triple dielectric system consisting of oxide/nitride/oxide. The shank of the probe taper from 200um to tens of urn tip and has 30 um thickness.

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Modeling of Laser Micromachining of Quasi-three-dimensional Shapes (레이저를 이용한 준삼차원 미소형상 가공 모델링)

  • Shin Kui Sung;Yoon Kyung Koo;Whang Kyung Hyun;Bang Se Yoon
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.7 s.172
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    • pp.79-87
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    • 2005
  • This paper summarizes the work on the development of a simulation program for modelling the process of machining quasi-three dimensional shape with the excimer laser beam on a constantly moving polymers. Relatively simple masks of rectangle, triangle and half circle shape are considered. The etching depth is calculated by considering the number of laser pulses irradiated on the specimen surface. It was found that similar shapes as experimental results can be obtained by choosing suitable parameters of moving velocity, moving distance and mask sizes.

Block Copolymer (PS-b-PMMA) Etching Using Cl2/Ar Gas Mixture in Neutral Beam System (Cl2/Ar gas mixture 중성빔을 이용한 블록공중합체 식각 연구)

  • Yun, Deok-Hyeon;Kim, Gyeong-Nam;Seong, Da-In;Park, Jin-U;Kim, Hwa-Seong;Yeom, Geun-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2015.11a
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    • pp.332-332
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    • 2015
  • Block Copolymer lithography는 deep nano-scale device 제작을 위한 기존의 top-down방식의 photo-lithography를 대체할만한 기술로 많은 연구가 진행되고 있다. polystyrene(PS)/poly-methyl methacrylate (PMMA)로 구성된 BCP의 nano-scale PS mask는 일반적인 플라즈마 공정에 쉽게 damage를 입는다. 중성빔 식각을 이용하여 식각 공정 중 발생하는 BCP의 degradation을 감소시키고, 비등방성 식각 profile을 얻을 수 있으며 sidewall roughness(SWR)와 sidewall angle(SWA)가 향상되는 것을 알 수 있었다.

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Dependence of deep submicron CMOSFET characteristics on shallow source/drain junction depth (얕은 소오스/드레인 접합깊이가 deep submicron CMOSFET 소자 특성에 미치는 영향)

  • 노광명;고요환;박찬광;황성민;정하풍;정명준
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.4
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    • pp.112-120
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    • 1996
  • With the MOsES (mask oxide sidewall etch scheme)process which uses the conventional i-line stepper and isotropic wet etching, CMOSFET's with fine gate pattern of 0.1.mu.m CMOSFET device, the screening oxide is deposited before the low energy ion implantation for source/drain extensions and two step sidewall scheme is adopted. Through the characterization of 0.1.mu.m CMOSFET device, it is found that the screening oxide deposition sheme has larger capability of suppressing the short channel effects than two step sidewall schem. In cse of 200.angs.-thick screening oxide deposition, both NMOSFET and PMOSFET maintain good subthreshold characteristics down to 0.1.mu.m effective channel lengths, and show affordable drain saturation current reduction and low impact ionization rates.

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Fabrication of low-stress silicon nitride film for application to biochemical sensor array

  • Sohn, Young-Soo
    • Journal of Sensor Science and Technology
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    • v.14 no.5
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    • pp.357-361
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    • 2005
  • Low-stress silicon nitride (LSN) thin films with embedded metal line have been developed as free standing structures to keep microspheres in proper locations and localized heat source for application to a chip-based sensor array for the simultaneous and near-real-time detection of multiple analytes in solution. The LSN film has been utilized as a structural material as well as a hard mask layer for wet anisotropic etching of silicon. The LSN was deposited by LPCVD (Low Pressure Chemical Vapor Deposition) process by varing the ratio of source gas flows. The residual stress of the LSN film was measured by laser curvature method. The residual stress of the LSN film is 6 times lower than that of the stoichiometric silicon nitride film. The test results showed that not only the LSN film but also the stack of LSN layers with embedded metal line could stand without notable deflection.

A Fabrication Method of Blade Type Tip for Probe Unit Device (프르브유닛 소자용 블레이드형 팁 제조방법)

  • Lee, Keun-Woo;Lee, Jae-Hong;Kim, Chang-Kyo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.8
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    • pp.1436-1440
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    • 2007
  • Beryllium copper has been known to be an important material for the various fields of industry because it can be used for mechanical and electrical/electronic components that are subjected to elevated temperatures (up to $400^{\circ}C$ for short times). Blade type tip for probing the cells of liquid crystal display(LCD) was fabricated using beryllium copper foil. The dry film resist was employed as a mask for patterning of the blade type tip. The beryllium copper foil was etched using hydrochloric acidic iron-chloride solution. The concentration, temperature, and composition ratio of hydrochloric acidic iron-chloride solution affect the etching characteristics of beryllium copper foil. Nickel with the thickness of $3{\mu}m$ was electroplated on the patterned copper beryllium foil for enhancing its hardness, followed by electroplating gold for increasing its electrical conductivity. Finally, the dry film resist on the bridge was removed and half of the nickel was etched to complete the blade type tip.