• Proceedings of the Korean Vacuum Society Conference
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.384.2-384.2
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• 2014

We investigated the electrical and structural properties of chemical vapor deposition (CVD)-grown graphene and post treated by O2 plasma. For the patterning of graphene, the plasma technology is generally used and essential for etching of graphene. But, the cautious O2 plasma treatments are required to avoid the damage in graphene edge which can be the harmful effects on the device performance. To analyze the effects of plasma treatment on structural properties of graphene, the change of surface morphology of graphene are measured by scanning electron microscope and atomic force microscope before and after plasma treatment. In addition, the binding energy of carbon and oxygen are measured through to X-ray photoelectron spectroscopy. After plasma treatment, the severe changes of surface morphology and binding energy of carbon and oxygen were observed which effects on the change of sheet resistance. Finally, to analyze of graphene characteristics, we measured the Raman spectroscopy. The measured results showed that the plasma treatment makes the upward of D-peak and downward of G'-peak by elevated power of plasma.

• Korean Journal of Materials Research
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• 제8권9호
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• pp.825-830
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• 1998

자화된 유도결합형 C4F8 플라즈마로 SiO2를 건식식각시 실리콘 표면에 발생하는 손상과 오염에 대하여 연구하였다. 오염의 분석을 위해서 XPS, SIMS, TEM을 사용하였으며, 손상정도를 측정하기 위해서 HRTEM과 Schottky-diode 구성을 통한 I-V특성 측정을 사용하였다. 유도 결합형 C4F8 플라스마에 0에서 18Gauss까지의 자장이 가해짐에 따라서 실리콘 표면에 생기는 잔류막의 두께가 SiO2식각속도와 선택비의 증가와 함께 증가하였으며, XPS를 통하여 그 조성이 fluorine-rich에서 carbon-rich 한 상태로 변화함을 알 수 있었다. 자장을 가하지 않는 상태에서는 표면에서 $40\AA$부근까지 고밀도의 손상층이 관찰되었으나, 자장을 가함에 따라서 노출된 손상층의 깊이는 깊어지나 그 밀도는 줄어들음을 HRTEM을 통하여 관찰 할 수 있었다. Schottky-diode를 통한 I-V특성곡선의 분석으로 자장이 증가함에 따라서 전기적인 손상이 감소함을 알 수 있었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제16권6호
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• pp.460-464
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• 2003

The barium strontium titannate ((Ba,Sr)TiO$_3$:BST) thin films were etched in an inductively coupled plasma (ICP) as a function of CF$_4$/Ar gas mixing ratio. Under CF$_4$(20%)/Ar(80%), the maximum etch rate of the BST films was 400 $\AA$/min. Etching products were redeposited on the surface of BST and then the nature of crystallinity were varied. Therefore, we investigated the etched surface of BST by X-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM). The plasma damages were evaluated in terms of leakage current density by Agilent 4145C and dielectric constant by HP 4192 impedance analyzer. After the BST thin films exposed in the plasma, the leakage current density and roughness increases. After annealing at 600 $^{\circ}C$ for 10 min in $O_2$ ambient, the leakage current density, roughness and nonvolatile etch byproducts reduced. From this results, the plasma induced damages were recovered by annealing process owing to the relaxation of lattice mismatches by Ar ions and the desorption of metal fluorides in high temperature.

• Proceedings of the Korean Vacuum Society Conference
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.114-114
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• 2012

Metal-oxide-semiconductor field-effect transistors (MOSFETs)의 critical dimension (CD)가 sub 45 nm로 줄어듬에 따라 기존에 gate dielectric으로 사용하고 있는 SiO2에서 발생되는 high gate leakage current 때문에 새로운 high dielectric constant (k) 물질들이 연구되기 시작하였다. 여러 가지 high-k 물질 중에서, aluminum-oxide (Al2O3)는 높은 dielectric constant (~10)와 전자 터널링 barrier height (~2eV) 등을 가지기 때문에 많은 연구가 되고 있다. 그러나 Al2O3를 anisotropic한 patterning을 하기 위해 주로 사용되고 있는 halogen-based 플라즈마 식각 과정에서 나타나는 Al2O3와 하부 layer간의 낮은 식각 selectivity 뿐만 아니라 표면에 발생되는 defect, stoichiometry modification, roughness 변화 등의 많은 문제점들로 인하여 device performance가 감소하기 때문에 이를 해결하기 위한 많은 연구들이 진행중이다. 따라서 본 연구에서는 실리콘 기판위의 atomic layer deposition (ALD)로 증착된 Al2O3를 BCl3/Ar 중성빔을 이용하여 원자층 식각한 후 식각 특성을 분석해 보았다. Al2O3 표면을 BCl3로 absorption시킨 후 Ar 중성빔으로 desorption 시키는 과정에서 volatile한 aluminum-chlorides와 boron oxychloride가 형성되어 layer by layer로 제거됨을 관찰 할 수 있었다.

• Journal of the Korean institute of surface engineering
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• 제32권4호
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• pp.496-502
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• 1999

Electroplating of Ag and Au on the functional area of lead frames are required for good bonding ability in IC packaging. As the patterns of the lead frame become finer, development of new deposition technology has been required for solving problems associated with process control for uniform thickness on selected area. Sputtering was employed to investigate the adhesion between substrate Alloy42 and Ag film as a new candidate process alternative to conventional electroplating. Coating thickness of Ag film was controlled to 3.5$\mu\textrm{m}$ at room temperature as a reference. The deposition of film was optimized to ensure the adhesion by process parameters of substrate heating temperature at $100~300^{\circ}C$, sputter etching time at -300V for 10~30min, bias voltage of -100~-500V, and existence of Cr interlayer film of $500\AA$. The critical $load L_{c}$ /, defined as the minimum load at which initial damage occurs, was the highest up to 29N at bias voltage of -500V by scratch test. AFM surface image and AES depth profile were investigated to analyze the interface. The effect of bias voltage in sputtering was to improve the surface roughness and remove the oxide on Alloy42.

• Journal of the Korean institute of surface engineering
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• 제31권2호
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• pp.117-126
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• 1998

In this study, the residue remaining on the silicon wafer during the oxide overetching using $C_4F_8/H_2$ helicon were plasmas and effects of various cleaning and annealing methods on the removal of the remaining residue were investigated. The addition of 30%$H_2$ to the C4F8 plasma increased the C/F ratio and the thickness of the residue on the etched silicon surface. Most of the residuse on the etched surfaces colud be removed by the oxygen plasmsa cleaning followed by thermal annealing over $450^{\circ}C$. Hydrogen-coataining residue formed on the silicon by 70%$C_4F_8/30%H_2$ helicon plasmas was more easily removed than hydrogen-free residue formed residue formed by $C_4F_8$ helicon wear plasmas. However, damage remaining on the silicon surface overetched using 70%$C_4F_8/30%H_2$ helicon plasmas was intensive and the degree of reocvery duing the post-annealing was lower.

• Journal of Institute of Control, Robotics and Systems
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• 제14권6호
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• pp.519-522
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• 2008

As industry of a semiconductor and LCD industry have been rapidly growing, precision technologies of machining such as etching and 3D measurement are required. Stylus has been important measuring method in traditional manufacturing process. However, its disadvantages are low measuring speed and damage possibility at contacting point. To overcome mentioned disadvantage, non-contacting measurement method is needed such as PMP(Phase Measuring Profilometry), WSI(white scanning interferometer) and Confocal Profilometry. Among above 3 well-known methods, WSI started to be applied to FPD(flat panel display) manufacturing process. Even though it overcomes 21t ambiguity of PMP method and can measure objects which has specular surface, the measuring speed and vibration coming from manufacturing machine are one of main issue to apply full automatic total inspection. In this study, We develop high speed WSI system and algorithm to reduce unknown noise. The developing WSI and algorithm are implemented to measure 3D surface of wafer. Experimental results revealed that the proposed system and algorithm are able to measure 3D surface profile of wafer with a good precision and high speed.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.145-148
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• 2007

The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

• Journal of Information Display
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• 제12권1호
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• pp.47-50
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• 2011

Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.45-48
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• 2000

High dielectric (Ba,Sr)TiO$_3$ thin films were etched in an inductively coupled plasma (ICP) as a function of C1$_2$/Ar gas mixing ratio. Under Cl$_2$(20)/Ar(80), the maximum etch rate of the BST films was 400$\AA$/min and selectivities of BST to Pt and PR were obtained 0.4 and 0.2, respectively. We investigated the etched surface of BST by x-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and x-ray diffraction (XRD). From the result of XPS analysis, we found that residues of Ba-Cl and Ti-Cl bonds remained on the surface of the etched BST for high boiling point. The surface roughness decreased as Cl$_2$ increases in Cl$_2$/Ar plasma because of non-volatile etching products. This changed the nature of the crystallinity of BST. From the result of XRD analysis, the crystalliility of etched BST film maintained as similar to as-deposited BST under Ar only and Cl$_2$(20)/Ar(80). However, (100) orientation intensity of etched BST film abruptly decreased at Cl$_2$ only plasma. It was caused that Cl compounds were redeposited on the etched BST surface and damaged to crystallinity of BST film during the etch process.