• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.711-714
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• 2008

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.523-523
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• 2012

As the wafer geometric requirements continuously complicated and minutes in tens of nanometers, the expectation of real-time add-on sensors for in-situ plasma process monitoring is rapidly increasing. Various industry applications, utilizing plasma impedance monitor (PIM) and optical emission spectroscopy (OES), on etch end point detection, etch chemistry investigation, health monitoring, fault detection and classification, and advanced process control are good examples. However, process monitoring in semiconductor manufacturing industry requires non-invasiveness. The hypothesis behind the optical monitoring of plasma induced ion current is for the monitoring of plasma induced charging damage in non-invasive optical way. In plasma dielectric via etching, the bombardment of reactive ions on exposed conductor patterns may induce electrical current. Induced electrical charge can further flow down to device level, and accumulated charges in the consecutive plasma processes during back-end metallization can create plasma induced charging damage to shift the threshold voltage of device. As a preliminary research for the hypothesis, we performed two phases experiment to measure the plasma induced current in etch environmental condition. We fabricated electrical test circuits to convert induced current to flickering frequency of LED output, and the flickering frequency was measured by high speed optical plasma monitoring system (OPMS) in 10 kHz. Current-frequency calibration was done in offline by applying stepwise current increase while LED flickering was measured. Once the performance of the test circuits was evaluated, a metal pad for collecting ion bombardment during plasma etch condition was placed inside etch chamber, and the LED output frequency was measured in real-time. It was successful to acquire high speed optical emission data acquisition in 10 kHz. Offline measurement with the test circuitry was satisfactory, and we are continuously investigating the potential of real-time in-situ plasma induce current measurement via OPMS.

• Transactions on Electrical and Electronic Materials
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• v.3 no.3
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• pp.14-17
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• 2002

The HDP (High Density Plasma) CVD process consists of a simultaneous sputter etch and chemical vapor deposition. As CMOS process continues to scale down to sub- quarter micron technology, HDP process has been widely used fur the gap-fill of small geometry metal spacing in inter-metal dielectric process. However, HBP CVD system has some potential problems including plasma-induced damage. Plasma-induced gate oxide damage has been an increasingly important issue for integrated circuit process technology. In this paper, thin gate oxide charge damage caused by HDP deposition of inter-metal dielectric was studied. Multiple step HDP deposition process was demonstrated in this work to prevent plasma-induced damage by introducing an in-situ top SiH$_4$ unbiased liner deposition before conventional deposition.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.287-287
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• 2011

ITRS(international technology roadmap for semiconductors)에 따르면 MOS (metal-oxide-semiconductor)의 CD(critical dimension)가 45 nm node이하로 줄어들면서 poly-Si/SiO2를 대체할 수 있는 poly-Si/metal gate/high-k dielectric이 대두되고 있다. 일반적으로 metal gate를 식각시 정확한 CD를 형성시키기 위해서 plasma를 이용한 RIE(reactive ion etching)를 사용하고 있지만 PIDs(plasma induced damages)의 하나인 PICD(plasma induced charging damage)의 발생이 문제가 되고 있다. PICD의 원인으로 plasma의 non-uniform으로 locally imbalanced한 ion과 electron이 PICC(plasma induced charging current)를 gate oxide에 발생시켜 gate oxide의 interface에 trap을 형성시키므로 그 결과 소자 특성 저하가 보고되고 있다. 그러므로 본 연구에서는 이에 차세대 MOS의 metal gate의 식각공정에 HDP(high density plasma)의 ICP(inductively coupled plasma) source를 이용한 중성빔 시스템을 사용하여 PICD를 줄일 수 있는 새로운 식각 공정에 대한 연구를 하였다. 식각공정조건으로 gas는 HBr 12 sccm (80%)와 Cl2 3 sccm (20%)와 power는 300 w를 사용하였고 200 eV의 에너지로 식각공정시 TEM(transmission electron microscopy)으로 TiN의 anisotropic한 형상을 볼 수 있었고 100 eV 이하의 에너지로 식각공정시 하부층인 HfO2와 높은 etch selectivity로 etch stop을 시킬 수 있었다. 실제 공정을 MOS의 metal gate에 적용시켜 metal gate/high-k dielectric CMOSFETs의 NCSU(North Carolina State University) CVC model로 effective electric field electron mobility를 구한 결과 electorn mobility의 증가를 볼 수 있었고 또한 mos parameter인 transconductance (Gm)의 증가를 볼 수 있었다. 그 원인으로 CP(Charge pumping) 1MHz로 gate oxide의 inteface의 분석 결과 이러한 결과가 gate oxide의 interface trap양의 감소로 개선으로 기인함을 확인할 수 있었다.

• Journal of the Korean Vacuum Society
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• v.8 no.4A
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• pp.490-495
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• 1999

In 0.18 $\mu \textrm m$ LOGIC device, the etch rate of NMOS polysilicons is different from that of PMOS polysilicons due to the state of polysilicon to manufacture gate line. To control the etch profile, we tested the ratio of $Cl_2$/HBr gas and the total chamber pressure, and also we reduced Back He pressure to get the vertical profile. In the case of manufacturing the gate photoresist line, we used Bottom Anti-Reflective Coating (BARC) to protect refrection of light. As a result we found that $CF_4O_2$ gas is good to etch BARC, because of high selectivity and good photoresist line profile after etching BARC. in the results of the characterization of plasma damage to the antenna effect of gate oxide, NO type thin film(growing gate oxide in 0, ambient followed by an NO anneal) is better than wet type thin film(growing gate oxide in $0_2+H_2$ ambient).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.171-174
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• 2002

The barium strontium titannate (BST) thin films were etched in $CF_{4}/Ar$ inductively coupled plasma (ICP). The high etch rate obtained at a $CF_{4}(20%)/Ar(80%)$ and the etch rate in pure argon was twice higher than that in pure $CF_{4}$. This indicated that BST etching is sputter dominant process. It is impossible to avoid plasma-induced damages by the energetic particles in the plasma and the nonvolatile etch products. The plasma damages were evaluated in terms of leakage current density, residues on the etched sample, and the changes of roughness. After the BST thin films exposed in the plasma, the leakage current density and roughness increases. In addition, there are appeared a nonvolatile etch byproductsand from the result of X-ray photoelectron spectroscopy (XPS). After annealing at ${600^{\circ}C}$ for 10 min in $O_{2}$ ambient, the increased leakage current density, roughness and nonvolatile etch byproducts reduced. From the this results, the plasma induced damage recovered by annealing process owing to the relaxation of lattice mismatches by Ar ions and the desorption of metal fluorides in high temperature.

• Transactions of Materials Processing
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• v.13 no.3
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• pp.268-272
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• 2004

Transparent materials such as fused silica are widely utilized in optical and optoelectronics field because of its outstanding properties, such as transparency in a wide wavelength range, strong damage resistance for laser irradiation, and high thermal and chemical stability. In this study, we made a few micro patterns on the surface of fused silica plate using laser induced wet etching. KrF excimer laser was used as a light source. There were no burrs and micro cracks on the etched surface of fused silica and the flatness of the etched surface was fairly good. We investigated the influence of etchant upon the etch rate and quality in laser induced wet etching. Pyrene-acetone solution and toluene were used as etchant. In the side of etch rate, toluene solution was better than pyrene-acetone solution. But we made in wider range of energy density using pyrene-acetone solution. But pyrene-acetone solution gave us wider window of energy density for successful micro patterning.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2004.05a
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• pp.245-249
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• 2004

Transparent materials such as fused silica are important materials in optical and optoelectronics field because of its outstanding properties, such as transparency in a wide wavelength range, strong damage resistance for laser irradiation, and high thermal and chemical stability. However, these properties make it difficult to micromachine silica in micro-sized quantities. In this study, we fabricated a micro patterns on the surface of fused silica plate using laser induced wet etching. KrF excimer laser was used as a light source. There were no burrs and micro cracks on the etched surface of fused silica and the flatness of the etched surface was fairly good. We investigated the influence of etchant upon the etch rate and quality in laser induced wet etching. Pyrene-acetone, toluene, and pyrene-toluene solution were used as etchant. In the side of etch rate, toluene and pyrene-toluene solution were better than pyrene-acetone solution.

• Current Photovoltaic Research
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• v.4 no.2
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• pp.54-58
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• 2016

Laser-doped selective emitter process requires dopant source deposition, spin-on-glass, and is able to form selective emitter through SiNx layer by laser irradiation on desired locations. However, after laser doping process, the remaining dopant layer needs to be washed out. Laser-induced melting of pre-deposited impurity doping is a precise selective doping method minimizing addition of process steps. In this study, we introduce a novel scheme for fabricating highly efficient selective emitter solar cell by laser doping. During this process, laser induced damage induces front contact destabilization due to the hindrance of silver nucleation even though laser doping has a potential of commercialization with simple process concept. When the laser induced damage is effectively removed using solution etch back process, the disadvantage of laser doping was effectively removed. The devices fabricated using laser doping scheme power conversion efficiency was significantly improved about 1% abs. after removal the laser damages.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.363-363
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• 2008

The development of dry etching process for sapphire wafer with plasma has been key issues for the opto-electric devices. The challenges are increasing control and obtaining low plasma induced-damage because an unwanted scattering of radiation is caused by the spatial disorder of pattern and variation of surface roughness. The plasma-induced damages during plasma etching process can be classified as impurity contamination of residual etch products or bonding disruption in lattice due to charged particle bombardment. Therefor, fine pattern technology with low damaged etching process and high etch rate are urgently needed. Until now, there are a lot of reports on the etching of sapphire wafer with using $Cl_2$/Ar, $BCl_3$/Ar, HBr/Ar and so on [1]. However, the etch behavior of sapphire wafer have investigated with variation of only one parameter while other parameters are fixed. In this study, we investigated the effect of pressure and other parameters on the etch rate and the selectivity. We selected $BCl_3$ as an etch ant because $BCl_3$ plasmas are widely used in etching process of oxide materials. In plasma, the $BCl_3$ molecule can be dissociated into B radical, $B^+$ ion, Cl radical and $Cl^+$ ion. However, the $BCl_3$ molecule can be dissociated into B radical or $B^+$ ion easier than Cl radical or $Cl^+$ ion. First, we evaluated the etch behaviors of sapphire wafer in $BCl_3$/additive gases (Ar, $N_2,Cl_2$) gases. The behavior of etch rate of sapphire substrate was monitored as a function of additive gas ratio to $BCl_3$ based plasma, total flow rate, r.f. power, d.c. bias under different pressures of 5 mTorr, 10 mTorr, 20 mTorr and 30 mTorr. The etch rates of sapphire wafer, $SiO_2$ and PR were measured with using alpha step surface profiler. In order to understand the changes of radicals, volume density of Cl, B radical and BCl molecule were investigated with optical emission spectroscopy (OES). The chemical states of $Al_2O_3$ thin films were studied with energy dispersive X-ray (EDX) and depth profile anlysis of auger electron spectroscopy (AES). The enhancement of sapphire substrate can be explained by the reactive ion etching mechanism with the competition of the formation of volatile $AlCl_3$, $Al_2Cl_6$ or $BOCl_3$ and the sputter effect by energetic ions.