• Bulletin of the Korean Mathematical Society
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• v.57 no.2
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• pp.295-309
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• 2020

Loop transversal codes take an alternative approach to the theory of error-correcting codes, placing emphasis on the set of errors that are to be corrected. Hitherto, the loop transversal code method has been restricted to linear codes. The goal of the current paper is to extend the conceptual framework of loop transversal codes to admit nonlinear codes. We present a natural example of this nonlinearity among perfect single-error correcting codes that exhibit efficient domination in a circulant graph, and contrast it with linear codes in a similar context.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.2
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• pp.86-91
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• 2014

Holographic data storage (HDS) has a number of advantages, including a high transmission rate through the use of a charge coupled device array for reading two-dimensional (2D) pixel image data, and a high density capacity. HDS also has disadvantages, including 2d intersymbol interference by neighboring pixels and interpage interference by multiple pages stored in the same holographic volume. These problems can be eliminated by modulation codes. We propose a 7/9 error-correcting modulation code that exploits a Viterbi-trellis algorithm and has a code rate larger (about 0.778) than that of the conventional 6/8 balanced modulation code. We show improved performance of the bit error rate with the proposed scheme compared to that of the simple 7/9 code without the trellis scheme and the 6/8 balanced modulation code.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1135-1136
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• 2008

Error correcting codes (ECC) are widely used in all types of memory in industry, including caches and embedded memory. The focus in this paper is on studying of power consumption in memory ECCs circuitry that provides single error correcting and double error detecting (SEC-DED) designed by various evolution strategies. The methods are applied to two commonly used SEC-DED codes: Hamming and odd column weight Hsiao codes. Finally, we conduct some simulations to show the performance of the various methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.10 no.5
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• pp.209-217
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• 1985

Using the Reed-Muller Codes, the encoder and decoder system has been designed and tested in this paper. The error correcting capability of this code is [J/2} or less and the error correcting procedure can be implemented easily by using simple logic circuitry. The encoding and decoding circuits are obtained by the cyclic property and for the O15, 11) Reed-Muller code majority-logic decoding is taken. The performance is measured in error probability and weight destribution. The encoder and decoder system has been designed, implemented and interfaced with the microcomputer by using the 8255 chip. Experimental results show that the system has single error-correcting capability and total execution time for a data is about 70usec. When the probability of channel error is $10^{-6}$~$10^{-4}$ the system using the (15, 11) Reed-Muller code works very good.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.43-49
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• 2008

In this paper, a method using the Ant Colony Optimization(ACO) is proposed for reducing the power consumption of memory ECC checker circuitry which provide Single-Error Correcting and Double-Error Detecting(SEC-DED). The H-matrix which is used to generate SEC-DED codes is optimized to provide the minimum switching activity with little to no impact on area or delay using the symmetric property and degrees of freedom in constructing H-matrix of Hsiao codes. Experiments demonstrate that the proposed method can provide further reduction of power consumption compared with the previous works.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.712-720
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• 1994

In digital mobile communication systems, the convolutional coding is considered as the optimum error correcting scheme. Recently, the Viterbi algorithm is widely used for the decoding of convolutional code. Most Viterbi decoder has been proposed in conde rate R=1/2 or 2/3 with memory components (m) less than 3. which degrades the error correcting capability because of small code constraints (K). We consider the design method for typical code rate R=1/2, K=7(171,133) convolutional code with memory components, m=6. In this paper, a novel construction method is presented which combines maximum likelihood decoding with a state transition double detection and comparison method. And the designed circuit has the error-correcting capability of random 2 bit error. As the results of logic simulation, it is shown that the proposed Viterbi decoder exactly corrects 1 bit and 2 bit error signal.

• Journal of the Korean Society of Safety
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• v.16 no.4
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• pp.147-152
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• 2001

The tower cranes are the very useful construction machine in the high place works. But they are very susceptible to the load balance, the wind load and the hanging load because they are the very slender structures and those center of gravity is located in the upper part. Therefore, the collapse accidents of tower one have repeatedly happened during the assemble or disassemble works. The correcting frame may has often used in order to correct the error in the setting of foundation anchors. The goal of this study is that propose the methods preventible the collapse accident of tower crane which is constructed by using the correcting frame. In order to accomplish the goal of this study, the field survey, the reference investigation and the structure analysis were performed for the collapse accident of tower crane using the correcting frame. This study result in the methods preventible the same accident.

• Journal of the Korean Mathematical Society
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• v.48 no.3
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• pp.475-486
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• 2011

The paper deals with repeated low-density burst error detecting codes with a specied weight or less. Linear codes capable of detecting such errors have been studied. Further codes capable of correcting and simultaneously detecting such errors have also been dealt with. The paper obtains lower and upper bounds on the number of parity-check digits required for such codes. An example of such a code has also been provided.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1997.11a
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• pp.137-146
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• 1997

The simplest bit error detection scheme is to append a parity bit to the end of a bit sequence. In this paper an error correction technique with the use of a parity bit is proposed, and the performance of the proposed system is analyzed. The error probability of the proposed system is compared with the output of computer simulation of the proposed system. It is also compared with the error probability of error at BPSK system, and the signal-to-noise ratio gain is showed.

• The KIPS Transactions:PartC
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• v.13C no.2 s.105
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• pp.241-248
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• 2006

Mobile computing has such characteristics as portability, wireless network, mobility, etc. These characteristics cause various problems to mobile terminals like frequent disconnection, high error rate, and varying network status. These problems motivate us to develop an adaptive error control mechanism for supporting multimedia service in mobile computing environment. In this paper, we propose the Adaptive Error Control(AEC) scheme using client's buffer size and current error rate. After categorizing the status into four groups according to client's buffer size and current error rate, this scheme applies an appropriate error control scheme to each status. In this scheme, thresholds of buffer size and error rate are determined by the data transmission time, play rate and average VOP size, and by the probability of error for a sequence of packets. The performance of proposed scheme is evaluated by flaying MPEG-4 files on an experimental client/server environment, respectively. The results show that error correcting rate is similar to other schemes while the time for correcting error reduce a little. In addition, the size of data for correcting error is decreased by 23% compared with FEC and Hybrid FEC, respectively. Theses results demonstrate that the proposed scheme is more suitable in mobile computing environment with small bandwidth and varying environment than existing schemes.