• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.9
• /
• pp.104-113
• /
• 1994

We have fabricated n-p-n HBTs using 3-inchAlgaAs/GaAs hetero structure epi-wafers grown by MBE. DC and AC characteristics of HBT devices were measured and analyzed. For HBT epi-structure, Al composition of emitter was graded in the region between emitter cap and emitter. And base layer was designed with concentration of 1${\times}10^{19}/cm^{3}$ and thickness of 50nm, and Be was used as the p-type dopant. Principal processes for device fabrication consist of photolithography using i-line stepper, wet mesa etching, and lift-off of each ohmic metal. The PECVD SiN film was used as the inslator for the metal interconnection. HBT device with emitter size of 3${\times}10{\mu}m^{2}$ resulted in cut-off frequency of 35GHz, maximum oscillation frequency of 21GHz, and current gain of 60. The distribution of the ideality factor of collector and base current was very uniform, and the average values of off-set voltage and current was very uniform, and the average values of off-set voltage and current gain were 0.32V and 32 within a 3-inch wafer.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.480.1-480.1
• /
• 2014

In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.100.2-100.2
• /
• 2012

Surface texturing of crystalline silicon is carried out in alkaline solutions for anisotropic etching that leads to random pyramids of about $10{\mu}m$ in size. Recently textured pyramids size gradually reduced using new solution. In this paper, we investigated that texture pyramids size had an impact on emitter property and front electrode (Ag) contact. To make small (${\sim}3{\mu}m$) and large (${\sim}10{\mu}m$) pyramids size, texturing times control and one side texturing using a silicon nitride film were carried out. Then formation and quality of POCl3-diffused n+ emitter in furnace compare with small and large pyramids by using SEM images, simulation (SILVACO, Athena module) and emitter saturation current density (J0e). After metallization, Ag contact resistance was measured by transfer length method (TLM) pattern. And surface distributions of Ag crystallites were observed by SEM images. Also, performance of cell which is fabricated by screen-printed solar cells is compared by light I-V.

• Journal of the Semiconductor & Display Technology
• /
• v.10 no.4
• /
• pp.61-64
• /
• 2011

In order to grow the crystalline solar cells industry continuously, development of alternate low-cost manufacturing processes is required. Plasma doping system is the technique for introducing dopants into semiconductor wafers in CMOS devices. In photovoltaics, plasma doping system could be an interesting alternative to thermal furnace diffusion processes. In this paper, plasma doping system was applied for phosphorus doping in crystalline solar cells. The Plasma doping was carried out in 1~4 KV bias voltages for four minutes. For removing surface damage and formation of pn junction, annealing steps were carried out in the range of $800{\sim}900^{\circ}C$ with $O_2$ ambient using thermal furnace. The junction depth in about $0.35{\sim}0.6{\mu}m$ range have been achieved and the doping profiles were very similar to emitter by thermal diffusion. So, It could be confirmed that plasma doping technique can be used for emitter formation in crystalline solar cells.

• Current Photovoltaic Research
• /
• v.2 no.3
• /
• pp.130-134
• /
• 2014

We have fabricated the selective emitter solar cell using double textured nanowires structure. The $40{\times}40mm2$-sized silicon substrates were textured to form the pyramid-shaped surface and the nanowires were fabricated by metal assisted chemical etching process using Ag nanoparticles, subsequently. The heavily doped and shallow emitters for selectiv eemitter solar cells were prepared through the thermal $POCl_3$ diffusion and chemical etch-back process, respectively. The front and rear electrodes were prepared following conventional screen printing method and the widths of fingers have been optimized. The selective emitter solar cell using double textured nanowires structure achieved a conversion efficiency of 17.9% with improved absorption and short circuit current density.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.136-137
• /
• 2008

Solar cell's efficiency depends on silicon's characteristic itself, or additional process such as texturing, coating, etc. Using PC1D, by adjusting Texturing, Base Resistivity, Emitter Doping, simulate many situation and observe the result. When texture Angle=$80^{\circ}$, Texture Depth=2um, Base Resistivity = 0.2, Emitter Doping = 8*Exp(19) are set, the solar cell's efficiency si 19.89%, and optimized.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.4
• /
• pp.330-335
• /
• 2003

This paper reports the optimum structure of the vacuum packaged Porous poly-silicon Nano-Structured (PNS) emitter. The PNS layer was obtained by electrochemical etching process into polycrystalline silicon layer in a process controlled to anodizing condition. Current-voltage studies were carried out to optimize process condition of electron emission properties as a function of anodizing condition and top electrode thickness. Also, we measured in advance the electron emission properties as a function of substrate temperature because the vacuum packaged process was performed under the condition of high temperature ambient (430$^{\circ}C$). Auger Electron Spectrometer (AES) studies shows that Au as a top-electrode was diffused to PNS layer during temperature experiments. Thus, we optimized the thickness of top-electrode in order to make the vacuum package PNS emitter. As a result, the vacuum Packaged PNS emitter was successfully emitted by optimizing process.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.5
• /
• pp.1004-1009
• /
• 2009

Recently, mass spectrometers are widely used for in-situ chemical analysis. It has rapid response and high sensitivity. In this paper, we present the fabrication and test of a cold cathode emitter for micro mass spectrometer using CNTs(Carbon nano tubes). The CNTs have good mechanical, electrical and chemical characteristics. So they have a long life time and strong robustness. The micro mass spectrometer is composed of the glass substrate and the silicon substrate. The glass substrate is constructed by electrodes for TOF(Time-of-flight) which analyze an ion with mass to charge ratio as ion separator. The silicon substrate is highly doped wafer which is patterned for gate electrode and then 100 11m dry etching to grow the CNTs as the electron emitter. The CNTs are grown by HFCVD(Hot filament chemical vapor deposition) with sputtering the catalyst. We successfully attained to grow the CNTs and to test the characteristics.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.13 no.5
• /
• pp.886-893
• /
• 2010

This paper considers the problem of time difference-of-arrival(TDOA) source localization when the TDOA and angle of arrival(AOA) measurements from an airborne emitter source are subject to ground-platform sensor position. The optimization of sensors' position is a challenging problem and a solution with good localization accuracy has yet to be found. This paper proposes an estimator that can achieve these purposes and provides optimized sensor position for good localization accuracy using the proposed estimator. The developed algorithm and sensor position are then examined under the special case of a single airborne source. The theoretical developments are supported by simulations.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.105.1-105.1
• /
• 2013

Schottky Emitter (SE)는 미국 FEI의 L. W. Swanson 그룹이 개발하여 상용화시킨 전자원이며, 고분해능 전자현미경용 전자원 시장에서 가장 큰 점유율을 차지하고 있다. 상온에서 작동하는 cold field emitter (CFE)에 비해 휘도(brightness)가 10~100배 정도 낮으나, 10-10 Torr 영역의 초고진공에서도 수시간 미만의 방출전류 안정성을 가진 CFE에 비해 수개월이상 안정된 방출전류를 전자현미경에 제공하므로, 반도체 측정, 검사 등과 같이 고분해능과 안정성이 동시에 요구되는 분야에서는 SE전자원은 필수 요소가 되어있다. 현재 SE 전자원은 일본, 미국, 영국의 4개사가 과점하고 있는 상태이다. SE 전자원이 안정되게 작동하기 위해서는 10~10 Torr 영역의 초고진공 환경이 요구된다. 한국 전자현미경 업체는 국책과제 등을 통해 SE 전자총을 개발해 왔으나, 진공기술과 광학계 설계기술이 부족하여 안정된 SE 전자총의 개발에 성공하지 못하였다. 본 발표에서는 10~10 Torr 영역에서 200 microA 이상의 전류를 안정되게 방출하는 SE 전자총의 전자빔 방출 및 진공특성을 보고한다. 시뮬레이션을 통해 구한 전차총의 전자원 위치 변화, 건렌즈 초점거리, 수차 등의 광학특성을 보여준다. 전자총을 전자현미경 경통에 탑재하고 제어하기 위해서는 전자총뿐만 아니라 전자현미경 전체의 광학특성을 이해할 필요가 있다. 전자총을 현미경에 통합 제어하기 위한 기술과제에 대해서도 간략히 보고한다.