• Title/Summary/Keyword: embedded controller

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Hierarchical Power Management Architecture and Optimal Local Control Policy for Energy Efficient Networks

  • Wei, Yifei;Wang, Xiaojun;Fialho, Leonardo;Bruschi, Roberto;Ormond, Olga;Collier, Martin
    • Journal of Communications and Networks
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    • v.18 no.4
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    • pp.540-550
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    • 2016
  • Since energy efficiency has become a significant concern for network infrastructure, next-generation network devices are expected to have embedded advanced power management capabilities. However, how to effectively exploit the green capabilities is still a big challenge, especially given the high heterogeneity of devices and their internal architectures. In this paper, we introduce a hierarchical power management architecture (HPMA) which represents physical components whose power can be monitored and controlled at various levels of a device as entities. We use energy aware state (EAS) as the power management setting mode of each device entity. The power policy controller is capable of getting information on how many EASes of the entity are manageable inside a device, and setting a certain EAS configuration for the entity. We propose the optimal local control policy which aims to minimize the router power consumption while meeting the performance constraints. A first-order Markov chain is used to model the statistical features of the network traffic load. The dynamic EAS configuration problem is formulated as a Markov decision process and solved using a dynamic programming algorithm. In addition, we demonstrate a reference implementation of the HPMA and EAS concept in a NetFPGA frequency scaled router which has the ability of toggling among five operating frequency options and/or turning off unused Ethernet ports.

Methods for Swing Recognition and Shuttle Cock's Trajectory Calculation in a Tangible Badminton Game (체감형 배드민턴 게임을 위한 스윙 인식과 셔틀콕 궤적 계산 방법)

  • Kim, Sangchul
    • Journal of Korea Game Society
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    • v.14 no.2
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    • pp.67-76
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    • 2014
  • Recently there have been many interests on tangible sport games that can recognize the motions of players. In this paper, we propose essential technologies required for tangible games, which are methods for swing motion recognition and the calculation of shuttle cock's trajectory. When a user carries out a badminton swing while holding a smartphone with his hand, the motion signal generated by smartphone-embedded acceleration sensors is transformed into a feature vector through a Daubechies filter, and then its swing type is recognized using a k-NN based method. The method for swing motion presented herein provides an advantage in a way that a player can enjoy tangible games without purchasing a commercial motion controller. Since a badminton shuttle cock has a particular flight trajectory due to the nature of its shape, it is not easy to calculate the trajectory of the shuttle cock using simple physics rules about force and velocity. In this paper, we propose a method for calculating the flight trajectory of a badminton shuttle cock in which the wind effect is considered.

System identification of soil behavior from vertical seismic arrays

  • Glaser, Steven D.;Ni, Sheng-Huoo;Ko, Chi-Chih
    • Smart Structures and Systems
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    • v.4 no.6
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    • pp.727-740
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    • 2008
  • A down hole vertical seismic array is a sequence of instruments installed at various depths in the earth to record the ground motion at multiple points during an earthquake. Numerous studies demonstrate the unique utility of vertical seismic arrays for studying in situ site response and soil behavior. Examples are given of analyses made at two sites to show the value of data from vertical seismic arrays. The sites examined are the Lotung, Taiwan SMART1 array and a new site installed at Jingliao, Taiwan. Details of the installation of the Jingliao array are given. ARX models are theoretically the correct process models for vertical wave propagation in the layered earth, and are used to linearly map deeper sensor input signals to shallower sensor output signals. An example of Event 16 at the Lotung array is given. This same data, when examined in detail with a Bayesian inference model, can also be explained by nonlinear filters yielding commonly accepted soil degradation curves. Results from applying an ARMAX model to data from the Jingliao vertical seismic array are presented. Estimates of inter-transducer soil increment resonant frequency, shear modulus, and damping ratio are presented. The shear modulus varied from 50 to 150 MPa, and damping ratio between 8% and 15%. A new hardware monitoring system - TerraScope - is an affordable 4-D down-hole seismic monitoring system based on independent, microprocessor-controlled sensor Pods. The Pods are nominally 50 mm in diameter, and about 120 mm long. An internal 16-bit micro-controller oversees all aspects of instrumentation, eight programmable gain amplifiers, and local signal storage.

Design of the 5-band Digital Audio Graphic Equalizer adopted Automatic Gain Controller (자동 이득 제어기를 적용한 5-밴드 디지털 오디오 그래픽 이퀄라이저 설계)

  • 김태형;김환용
    • Journal of the Korea Computer Industry Society
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    • v.3 no.1
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    • pp.27-34
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    • 2002
  • There is much interest on information communications owing to the rapid development of network and IT(Information Technology). Analog signals are converted into digital signals for information communications. However, it is very difficult to completely erase the distortion induced during the conversion of analog signals such as voices and images into digital signals. Existing audio graphic equalizer requires very complex processes to calculate the gain and coefficients of the higher-order filter which is required to generate natural sound and to satisfy the need of each person. Unfortunately it is uneconomical and very difficult to embed the existing digital audio equalizer in the system because of the complexity of the existing digital audio equalizer for high quality sound. This paper discusses the design of a new digital audio graphic equalizer(DAGEQ) which can improve system performance and the quality of audio sound, and can be embedded in the system. This new DAGEQ is designed so that the gain can be controlled automatically. The automatic control of coefficients and gain empowers real time processing and the improvement of audio quality.

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Feedback Shift Controller Design of Automatic Transmission for Tractors (트랙터 자동변속기 되먹임 변속 제어기 설계)

  • Jung, Gyu Hong;Jung, Chang Do;Park, Se Ha
    • Journal of Drive and Control
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    • v.13 no.1
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    • pp.1-9
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    • 2016
  • Nowadays automatic transmission equipped vehicles prevail in construction and agricultural equipment due to their convenience in driving and operation. Though domestic vehicle manufacturers install imported electronic controlled transmissions at present, overseas products will be replaced by domestic ones in the near future owing to development efforts over the past 10 years. For passenger cars, there are many kinds of shift control algorithms that enhance the shift quality such as feedback and learning control. However, since shift control technologies for heavy duty vehicles are not highly developed, it is possible to improve the shift quality with an organized control method. A feedback control algorithm for neutral-into-gear shift, which is enabled during the inertia phase for the master clutch slip speed to track the slip speed reference, is proposed based on the power transmission structure of TH100. The performance of the feedback shift control is verified by a vehicle test which is implemented with firmware embedded TCU. As the master clutch engages along the predetermined speed trajectory, it can be concluded that the shift quality can be managed by a shift time control parameter. By extending the proposed feedback algorithm for neutral-into-gear shift to gear change and shuttle shift, it is expected that the quality of the shift can be improved.

Autonomous Flight System of UAV through Global and Local Path Generation (전역 및 지역 경로 생성을 통한 무인항공기 자율비행 시스템 연구)

  • Ko, Ha-Yoon;Baek, Joong-Hwan;Choi, Hyung-Sik
    • Journal of Aerospace System Engineering
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    • v.13 no.3
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    • pp.15-22
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    • 2019
  • In this paper, a global and local flight path system for autonomous flight of the UAV is proposed. The overall system is based on the ROS robot operating system. The UAV in-built computer detects obstacles through 2-D Lidar and generates real-time local path and global path based on VFH and Modified $RRT^*$-Smart, respectively. Additionally, a movement command is issued based on the generated path on the UAV flight controller. The ground station computer receives the obstacle information and generates a 2-D SLAM map, transmits the destination point to the embedded computer, and manages the state of the UAV. The autonomous UAV flight system of the is verified through a simulator and actual flight.

Robust Wireless Sensor and Actuator Network for Critical Control System (크리티컬한 제어 시스템용 고강건 무선 센서 액추에이터 네트워크)

  • Park, Pangun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.11
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    • pp.1477-1483
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    • 2020
  • The stability guarantee of wireless network based control systems is still challenging due to the lossy links and node failures. This paper proposes a hierarchical cluster-based network protocol called robust wireless sensor and actuator network (R-WSAN) by combining time, channel, and space resource diversity. R-WSAN includes a scheduling algorithm to support the network resource allocation and a control task sharing scheme to maintain the control stability of multiple plants. R-WSAN was implemented on a real test-bed using Zolertia RE-Mote embedded hardware platform running the Contiki-NG operating system. Our experimental results demonstrate that R-WSAN provides highly reliable and robust performance against lossy links and node failures. Furthermore, the proposed scheduling algorithm and the task sharing scheme meet the stability requirement of control systems, even if the controller fails to support the control task.

Whole-body Management System using Ultra-Low Temperature Cyclical Cooling Method Combined with IT Technology (IT 기술을 접목한 초저온 순환 냉각 방식의 전신 관리 시스템)

  • Kim, Joo-Ho;Lee, Joo-Hyun;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.673-676
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    • 2020
  • In this paper, we propose a whole-body management system using ultra-low temperature cyclical cooling method combined with IT technology. The proposed system has the following characteristics. First, it minimizes maintenance costs by circulating nitrogen gas cooled by ultra-low temperature inside the controller. Secondly, based on the information measured by the temperature sensor and oxygen concentration sensor, nitrogen gas is supplied to provide safe ultra-low temperature whole-body management. Thirdly, after entering the user's height, it provides convenient, ultra-low temperature whole-body care that can be controlled using an automatic lift. Fourth, it provides an easy-to-access, easy-to-manage GUI and a manager-only web program for whole-body management system operation. The results tested by the authorized testing agency to assess the performance of the proposed system were measured in the range of ±5%, the world's highest temperature sensor accuracy, and a range of -110℃ to -150℃ greater than the world's highest whole-body management temperature range(-110℃ ~ -140℃). In addition, humidity was measured at less than 40%, the world's highest, and oxygen concentration was more than 18%, the world's highest. Therefore, the effectiveness of the methods proposed in this paper was demonstrated because they produced the same results as the world's highest levels.

Automatic On-Chip Glitch-Free Backup Clock Changing Method for MCU Clock Failure Protection in Unsafe I/O Pin Noisy Environment (안전하지 않은 I/O핀 노이즈 환경에서 MCU 클럭 보호를 위한 자동 온칩 글리치 프리 백업 클럭 변환 기법)

  • An, Joonghyun;Youn, Jiae;Cho, Jeonghun;Park, Daejin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.12
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    • pp.99-108
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    • 2015
  • The embedded microcontroller which is operated by the logic gates synchronized on the clock pulse, is gradually used as main controller of mission-critical systems. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The tolerant system operation is required against the various external electric noise and means the robust design technique is becoming more important issue in system clock failure problems. In this paper, we propose on-chip backup clock change architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit. The proposed circuits are evaluated by Verilog simulation and the fabricated IC is validated by using test equipment electrical field radiation noise

Buffer Cache Management for Low Power Consumption (저전력을 위한 버퍼 캐쉬 관리 기법)

  • Lee, Min;Seo, Eui-Seong;Lee, Joon-Won
    • Journal of KIISE:Computer Systems and Theory
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    • v.35 no.6
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    • pp.293-303
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    • 2008
  • As the computing environment moves to the wireless and handheld system, the power efficiency is getting more important. That is the case especially in the embedded hand-held system and the power consumed by the memory system takes the second largest portion in overall. To save energy consumed in the memory system we can utilize low power mode of SDRAM. In the case of RDRAM, nap mode consumes less than 5% of the power consumed in active or standby mode. However hardware controller itself can't use this facility efficiently unless the operating system cooperates. In this paper we focus on how to minimize the number of active units of SDRAM. The operating system allocates its physical pages so that only a few units of SDRAM need to be activated and the unnecessary SDRAM can be put into nap mode. This work can be considered as a generalized and system-wide version of PAVM(Power-Aware Virtual Memory) research. We take all the physical memory into account, especially buffer cache, which takes an half of total memory usage on average. Because of the portion of buffer cache and its importance, PAVM approach cannot be robust without taking the buffer cache into account. In this paper, we analyze the RAM usage and propose power-aware page allocation policy. Especially the pages mapped into the process' address space and the buffer cache pages are considered. The relationship and interactions of these two kinds of pages are analyzed and exploited for energy saving.