• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.30 no.9
• /
• pp.546-550
• /
• 2017

Ferroelectric properties are governed by domain structures and domain wall motions, so it is of significance to understand domain evolution processes under mechanical stress. In the present study, in situ piezoresponse force microscopy (PFM) observation under compressive stress was carried out for a near-morphotropic PZT. Both $180^{\circ}$ and $non-180^{\circ}$ domain structures were observed from PFM images, and their habit planes were identified using electron backscatter diffraction in conjunction with PFM data. By externally applied mechanical stress, needle-like $non-180^{\circ}$ domain patterns were broadened via domain wall motions. This was interpreted via phenomenological approach such that the total energy minimization can be achieved by domain wall motion rather than domain nucleation mainly due to the local gradient energy. Meanwhile, no motion was observed from curvy $180^{\circ}$ domain walls under the mechanical stress, validating that $180^{\circ}$ domain walls are not directly influenced by mechanical stress.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.19 no.10
• /
• pp.912-917
• /
• 2006

In this paper, Trench emitter electrode IGBT structure is proposed and studied numerically using the device simulator, MEDICI. The breakdown voltage, on-state voltage drop, latch up current density and turn-off time of the proposed structure are compared with those of the conventional trench gate IGBT(TIGBT) structures. Enhancement of the breakdown voltage by 19 % is obtained in the proposed structure due to dispersion of electric field at the edge of the bottom trench gate by trench emitter electrode. In addition, the on-state voltage drop and the latch up current density are improved by 25 %, 16 % respectively. However increase of turn-off time in proposed structures are negligible.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.04b
• /
• pp.47-51
• /
• 2000

A modified direct bonding technique employing a wet chemical deposition of $SiO_2$ film on a wafer surface to be bonded is proposed for the fabrication of Si-$SiO_2$-Si structures. Structural and electrical quality of the bonded wafers is studied. Satisfied insulating properties of interfacial $SiO_2$ layers are demonstrated. Elastic strain caused by surface morphology is investigated. The diminution of strain in the grooved structures is semi-quantitatively interpreted by a model considering the virtual defects distributed over the interfacial region.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.647-647
• /
• 2013

We apply a density functional theory (DFT) and DFT-based non-equilibrium Green's function approach to study the structures, energetics and charge transport characteristics of nitrogen-doped graphene and graphene nanoribbons (GNRs) with additional doping of phosphorus or boron atoms. Considering graphitic, pyridinic, and porphrin-like N doping sites and increasing N-doping concentration, we analyze the structures of N-P and N-B doped graphene and particularly focus on how they affect the charge transport along the lateral direction. For the GNRs, we also consider the differences between defects formed at the edge and bulk regions. Implications of our findings in the context of electronic and energy device applications will be also discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.07a
• /
• pp.828-831
• /
• 2001

A simple and versatile method of manufacturing semiconductor devices with pn-junctions used the silicon direct bonding technology with simultaneous impurity diffusion is suggested . Formation of p- or n- type layers was tried during the bonding procedure by attaching two wafers in the aqueous solutions of Al(NO$_3$)$_3$, Ga(NO$_3$)$_3$, HBO$_3$, or H$_3$PO$_4$. An essential improvement of bonding interface structural quality was detected and a model for the explanation is suggested. Diode, Dynistor, and BGGTO structures were fabricated and examined. Their switching characteristics are presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1995.11a
• /
• pp.58-62
• /
• 1995

Thermally stimulated currents have been measured to investigate the trap characteristics of the MONOS structures with the tunneling oxide layer of 27${\AA}$ thick nitride layer of 73${\AA}$ thick and blocking oxide layer of 40${\AA}$ thick. By changing the write-in voltage and the write-in temperature, peaks of the I-T characteristic curve due to the nitride bulk traps and the blocking oxide-nitride interface traps ware separated from each other experimentally. The results indicate that the nitride bulk traps are distributed spatially at a single energy level and the blocking oxide-nitride interface traps are distributed energetically at interface.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.3
• /
• pp.249-258
• /
• 2004

We investigated structural phases of potassium intercalated into carbon nanotubes using a structural optimization process applied to atomistic simulation methods. As the radius of carbon nanotubes increased, structures were found in various phases from an atomistic strand to multishell packs composed of coaxial cylindrical shells and in helical, layed, and crystalline structures. Numbers of helical atom rows composed of coaxial tubes and orthogonal vectors of a circular rolling of a triangular network could explain multishell phases of potassium in carbon nanotubes.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.11a
• /
• pp.376-377
• /
• 2006

Chemical Mechanical Planarization (CMP) has emerged as an enabling technology for the manufacturing of multi-level metal interconnects used in high-density Integrated Circuits (IC). Recently, multi-level structures have been also widely used m the MEMS device such as micro engines, pressure sensors, micromechanical fluid pumps, micro mirrors and micro lenses. Especially, among the thin films available in IC technologies, polysilicon has probably found the widest range of uses in silicon technology based MEMS. This paper presents the characteristic of polysilicon CMP for multi-level MEMS structures. Two-step CMP process verifies that is possible to decrease dishing amount with two type of slurries characteristics. This approach is attractive because two-step CMP process can be decreased dishing amount considerably more then just one CMP process.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.1 s.343
• /
• pp.13-16
• /
• 2006

We have proposed and experimentally demonstrated the all-optical composite logic gates with XOR, NOR, OR and NAND functions using SOA-MZI structures to make it possible to simultaneously perform various logical functions. The proposed scheme is robust and feasible for high speed all-optical logic operation with high ER.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.4
• /
• pp.355-359
• /
• 2009

Si wafer, which was treated with TMSP-TBA (N-trimethoxysilylpropyl-n,n,n-tri-n-butylammonium bromide), was used foF a substrate to grow a MFI membrane. Growth of membranes was conducted in various conditions such as temperature and gravity, and their structures were in detail studied with field emission scanning electron microscope and x-ray diffractometer. The structures of membranes grown on substrates were strongly dependent on growing temperature and gravity.