• 제목/요약/키워드: electronic packaging

검색결과 579건 처리시간 0.023초

Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers

  • Moon, Dae-Ho;Ha, Tae-Min;Kim, Boom-Soo;Han, Seung-Soo;Hong, Sang-Jeen
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
    • /
    • pp.431-432
    • /
    • 2012
  • In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

  • PDF

기밀성 분석을 통한 RFID 태그 패키지 에폭시 몰딩 연구 (A Study on the RFID Tag Package Epoxy Molding through Leak Detection)

  • 반창우;홍석기;장동영
    • 한국생산제조학회지
    • /
    • 제21권2호
    • /
    • pp.297-304
    • /
    • 2012
  • Recently RFID (Radio Frequency Identification) technology advances in wireless communication technologies are bringing new challenges. But RFID tag packaging technology has been lagging compared to the demand, so this technology is being required to improve reliability. In this paper, reliability comparison among 11 types of most commonly used epoxy molding in electrical/electronic components packaging has been made through analysis of confidentiality using a humidity sensor. Consequently, the variation of moisture penetration time causes has been verified by the changes in molding thickness for 3 types of epoxy, and from the result, the best experimental results were observed in terms of confidentiality. Moreover we have been confirmed the relationship between confidentiality, the molding thickness, and thermal property of epoxy through thermal analysis.

Printing Morphology and Rheological Characteristics of Lead-Free Sn-3Ag-0.5Cu (SAC) Solder Pastes

  • Sharma, Ashutosh;Mallik, Sabuj;Ekere, Nduka N.;Jung, Jae-Pil
    • 마이크로전자및패키징학회지
    • /
    • 제21권4호
    • /
    • pp.83-89
    • /
    • 2014
  • Solder paste plays a crucial role as the widely used joining material in surface mount technology (SMT). The understanding of its behaviour and properties is essential to ensure the proper functioning of the electronic assemblies. The composition of the solder paste is known to be directly related to its rheological behaviour. This paper provides a brief overview of the solder paste behaviour of four different solder paste formulations, stencil printing processes, and techniques to characterize solder paste behaviour adequately. The solder pastes are based on the Sn-3.0Ag-0.5Cu alloy, are different in their particle size, metal content and flux system. The solder pastes are characterized in terms of solder particle size and shape as well as the rheological characterizations such as oscillatory sweep tests, viscosity, and creep recovery behaviour of pastes.

Effects of Nano-sized Diamond on Wettability and Interfacial Reaction for Immersion Sn Plating

  • Yu, A-Mi;Kang, Nam-Hyun;Lee, Kang;Lee, Jong-Hyun
    • 마이크로전자및패키징학회지
    • /
    • 제17권3호
    • /
    • pp.59-63
    • /
    • 2010
  • Immersion Sn plating was produced on Cu foil by distributing nano-sized diamonds (ND). The ND distributed on the coating surface broke the continuity of Sn-oxide layer, therefore leading to penetrate the molten solder through the oxide and retarding the wettability degradation during a reflow process. Furthermore, the ND in the Sn coating played a role of diffusion barrier for Sn atoms and decreased the growth rate of intermetallic compound ($Cu_6Sn_5$) layer during the solid-state aging. The study confirmed the importance of ND to improve the wettability and reliability of the Sn plating. Complete dispersion of the ND within the immersion Sn plating needs to be further developed for the electronic packaging applications.

PMMA 고분자 입자를 템플릿으로 이용한 실리카 중공체의 제조 (Synthesis of Hollow Silica Using PMMA Particle as a Template)

  • 황하수;조계민;박인
    • 공업화학
    • /
    • 제21권3호
    • /
    • pp.353-355
    • /
    • 2010
  • 양이온성의 2,2'-azobis(2-methylpropionamidine) (AIBA) 개시제를 이용한 methylmethacrylate (MMA)의 무유화제 에멀전 중합을 통해 polymethylmethacrylate (PMMA) 입자를 합성하였다. 스퇴버 방법을 이용하여 양이온성의 PMMA 입자 표면에 실리카를 코팅하였다. 음전하의 실리카 전구체는 양이온성의 PMMA 입자 표면과의 정전기적 인력에 의해 코팅된다. 실리카 코팅 과정 중에 PMMA 입자가 용해되어 후처리 없이 실리카 중공체를 얻을 수 있었다.

150℃이하 저온에서의 미세 접합 기술 (Low Temperature bonding Technology for Electronic Packaging)

  • 김선철;김영호
    • 마이크로전자및패키징학회지
    • /
    • 제19권1호
    • /
    • pp.17-24
    • /
    • 2012
  • Recently, flip chip interconnection has been increasingly used in microelectronic assemblies. The common Flip chip interconnection is formed by reflow of the solder bumps. Lead-Tin solders and Tin-based solders are most widely used for the solder bump materials. However, the flip chip interconnection using these solder materials cannot be applied to temperature-sensitive components since solder reflow is performed at relatively high temperature. Therefore the development of low temperature bonding technologies is required in these applications. A few bonding techniques at low temperature of $150^{\circ}C$ or below have been reported. They include the reflow soldering using low melting point solder bumps, the transient liquid phase bonding by inter-diffusion between two solders, and the bonding using low temperature curable adhesive. This paper reviews various low temperature bonding methods.

전도성 접착제를 이용한 패키징 기술 (Recent Advances in Conductive Adhesives for Electronic Packaging Technology)

  • 김종웅;이영철;노보인;윤정원;정승부
    • 마이크로전자및패키징학회지
    • /
    • 제16권2호
    • /
    • pp.1-9
    • /
    • 2009
  • Conductive adhesives have recently received a lot of focus and attention from the researchers in electronics industry as a potential substitute to lead-containing solders. Numerous studies have shown that the conductive adhesives have many advantages over conventional soldering such as environmental friendliness, finer pitch feasibility and lower temperature processing. This review focuses on the recent research trends on the reliability and property evaluation of anisotropic and non-conductive films that interconnect the integrated circuit component to the printed circuit board or other types of substrate. Major topics covered are the conduction mechanism in adhesive interconnects; mechanical reliability; thermo-mechanical-hygroscopic reliability and electrical performance of the adhesive joints. This review article is aimed at providing a better understanding of adhesive interconnects, their principles, performance and feasible applications.

  • PDF

무연솔더를 이용한 실리콘 압력센서의 플립칩 패키지 (Flip-Chip Package of Silicon Pressure Sensor Using Lead-Free Solder)

  • 조찬섭
    • 한국산업융합학회 논문집
    • /
    • 제12권4호
    • /
    • pp.215-219
    • /
    • 2009
  • A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

  • PDF

X-RAY Inspection for PCB/SMT & Electronics Components Latest Development

  • Maur Friendhelm W.
    • 한국마이크로전자및패키징학회:학술대회논문집
    • /
    • 한국마이크로전자및패키징학회 2004년도 국제표면실장 및 인쇄회로기판 생산기자재전:전자패키지기술세미나
    • /
    • pp.17-25
    • /
    • 2004
  • During the past few years, advances have been made in both in X-ray tube and detector technologies. The field of microfocus radioscopy has been established as an important testing process and has expanded into many new industrial applications that require quality control or process optimization. The first nanofocus and multifocus X-ray systems have become available with a focal spot of .5 micron. In the existing range of microfocus X-ray tubes, further improvements have been achieved as well, such as increased long term stability of intensity position constancy. Software, image processing and manipulation techniques have all progressed as well, allowing X-ray to become a formidable non-destructive inspection method for manufacturers in virtually every industry, especially those involved with Electronic Packaging and SMT.

  • PDF

Fe-Si 전기강판 폐스크랩을 이용한 연자성 분말 및 테이프 제조기술 (Manufacturing Technology for Tape Casting and Soft Magnetic Powder Using by Recycling Scrap of Fe-Si Electrical Sheet)

  • 홍원식;김상현;박지연;오철민;이우성;김승겸;한상조;심금택;김휘준
    • 마이크로전자및패키징학회지
    • /
    • 제23권2호
    • /
    • pp.11-18
    • /
    • 2016
  • This study focused on examining the possibility for recycling of Fe-Si electric sheet. We manufactured Fe-6.5Si mother alloy using by Fe-Si electric sheet scrap for transformer core materials. And then, soft magnetic alloy powder which diameter and shape were $45{\sim}150{\mu}m$ and sphere type was prepared by gas atomization process. As we compared to commercial Fe-6.5Si powder, its diameter distribution and microstructure of recycled powder was a similar. To investigate the possibility of reusing the soft magnetic composite sheet for electronics, recycled powder was treated to have a high aspect ratio (AR), and we finally obtained the 65~66 AR and $2.3{\mu}m$ thickness powder. To release the residual stress of powder, heat treatment was conducted under $300{\sim}400^{\circ}C$, $N_2$ gas. And then, soft magnetic sheet was made by tape casting process using by those powders. After the density and permeability of tape was measured, and we confirmed that the recycled Fe-Si electric sheet scrap was possible to reuse the soft magnetic materials of electronics.