• 제목/요약/키워드: electrode contact resistance

검색결과 168건 처리시간 0.026초

사각형 전극에서의 열유동 해석 (Simulation of heat flow for rectangular electrodes)

  • 신윤섭;박수웅;나석주
    • Journal of Welding and Joining
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    • 제8권1호
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    • pp.62-69
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    • 1990
  • Being focused on the recent studies that the fatigue strength of resistance spot weldmentes can be improved by using ellipsoidal weld nuggets, the voltage and temperature distribution in resistance spot weldments were simulated for the various rectangular electrodes which had the different aspect ratio of the contact area. Because the electrode shape was not axi-symmetric, the solution domain for simulation should be three dimensional. A series of experiments were carred out to verify the analytically obtained temperature distribution in the weldment. From the calculational and experimental results, it could be revealed that the nugget took the form of ellipsoid, while both results showed a considerable discrepancy for the high aspect ratio.

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Application of Buffer Layers for Back Contact in CdTe Thin Film Solar Cells

  • Chun, Seungju;Kim, Soo Min;Lee, Seunghun;Yang, Gwangseok;Kim, Jihyun;Kim, Donghwan
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.318.2-318.2
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    • 2014
  • The high contact resistance is still one of the major issues to be resolved in CdS/CdTe thin film solar cells. CdTe/Metal Schottky contact induced a high contact resistance in CdS/CdTe solar cells. It has been reported that the work function of CdTe thin film is more than 5.7 eV. There has not been a suitable back contact metal, because CdTe thin film has a high work function. In a few decades, some buffer layer was reported to improve a back contact problem. Buffer layers which are Te, $Sb_2Te_3$, $Cu_2Te$, ZnTe:Cu and so on was inserted between CdTe and metal electrode. A formed buffer layers made a tunnel junction. Hole carriers which was excited in CdTe film by light absorption was transported from CdTe to back metal electrode. In this report, we reported the variation of solar cell performance with different buffer layer at the back contact of CdTe thin film solar cell.

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Electrical Characterization of Electronic Materials Using FIB-assisted Nanomanipulators

  • Roh, Jae-Hong;You, Yil-Hwan;Ahn, Jae-Pyeong;Hwang, Jinha
    • Applied Microscopy
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    • 제42권4호
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    • pp.223-227
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    • 2012
  • Focused Ion Beam (FIB) systems have incorporated versatile nanomanipulators with inherent sophisticated machining capability to characterize the electrical properties of highly miniature components of electronic devices. Carbon fibers were chosen as a model system to test the applicability of nanomanipulators to microscale electronic materials, with special emphasis on the direct current current-voltage characterizations in terms of electrode configuration. The presence of contact resistance affects the electrical characterization. This resistance originates from either i) the so-called "spreading resistance" due to the geometrical constriction near the electrode - material interface or ii) resistive surface layers. An appropriate electrode strategy is proposed herein for the use of FIB-based manipulators.

AgAl 전극 고온 소성 조건 가변에 따른 N-형 결정질 실리콘 태양전지의 접촉 특성 분석 (Analysis of Contact Properties by Varying the Firing Condition of AgAl Electrode for n-type Crystalline Silicon Solar Cell)

  • 오동현;정성윤;전민한;강지윤;심경배;박철민;김현후;이준신
    • 한국전기전자재료학회논문지
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    • 제29권8호
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    • pp.461-465
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    • 2016
  • n-type silicon shows the better tolerance towards metal impurities with a higher minority carrier lifetime compared to p-type silicon substrate. Due to better lifetime stability as compared to p-type during illumination made the photovoltaic community to switch toward n-type wafers for high efficiency silicon solar cells. We fabricated the front electrode of the n-type solar cell with AgAl paste. The electrodes characteristics of the AgAl paste depend on the contact junction depth that is closely related to the firing temperature. Metal contact depth with p+ emitter, with optimized depth is important as it influence the resistance. In this study, we optimize the firing condition for the effective formation of the metal depth by varying the firing condition. The firing was carried out at temperatures below $670^{\circ}C$ with low contact depth and high contact resistance. It was noted that the contact resistance was reduced with the increase of firing temperature. The contact resistance of $5.99m{\Omega}cm^2$ was shown for the optimum firing temperature of $865^{\circ}C$. Over $900^{\circ}C$, contact junction is bonded to the Si through the emitter, resulting the contact resistance to shunt. we obtained photovoltaic parameter such as fill factor of 76.68%, short-circuit current of $40.2mA/cm^2$, open-circuit voltage of 620 mV and convert efficiency of 19.11%.

Investigation of the Contact Resistance Between Amorphous Silicon-Zinc-Tin-Oxide Thin Film Transistors and Different Electrodes Using the Transmission Line Method

  • Lee, Byeong Hyeon;Han, Sangmin;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제17권1호
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    • pp.46-49
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    • 2016
  • A thin film transistor (TFT) has been fabricated using the amorphous 0.5 wt% Si doped zinc-tin-oxide (a-0.5 SZTO) with different electrodes made of either aluminium (Al) or titanium/aluminium(Ti/Al). Contact resistance and total channel resistance of a-0.5SZTO TFTs have been investigated and compared using the transmission line method (TLM). We measured the total resistance of 1.0×102 Ω/cm using Ti/Al electrodes. This result is due to Ti, which is a material known for its adhesion layer. We found that the Ti/Al electrode showed better contact characteristics between the channel and electrodes compared with that made of Al only. The former showed a less contact and total resistance. We achieved high performance of the TFTs characteristic, such as Vth of 2.6 V, field effect mobility of 20.1 cm2 V−1s−1, S.S of 0.9 Vdecade−1, and on/off current ratio of 9.7×106 A. It was demonstrated that the Ti/Al electrodes improved performance of TFTs due to enhanced contact resistance.

Fabrication of One-Dimensional Graphene Metal Edge Contact without Graphene Exfoliation

  • Choe, Jeongun;Han, Jaehyun;Yeo, Jong-Souk
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.371.2-371.2
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    • 2016
  • Graphene electronics is one of the promising technologies for the next generation electronic devices due to the outstanding properties such as conductivity, high carrier mobility, mechanical, and optical properties along with extended applications using 2 dimensional heterostructures. However, large contact resistance between metal and graphene is one of the major obstacles for commercial application of graphene electronics. In order to achieve low contact resistance, numerous researches have been conducted such as gentle plasma treatment, ultraviolet ozone (UVO) treatment, annealing treatment, and one-dimensional graphene edge contact. In this report, we suggest a fabrication method of one-dimensional graphene metal edge contact without using graphene exfoliation. Graphene is grown on Cu foil by low pressure chemical vapor deposition. Then, the graphene is transferred on $SiO_2/Si$ wafer. The patterning of graphene channel and metal electrode is done by photolithography. $O_2$ plasma is applied to etch out the exposed graphene and then Ti/Au is deposited. As a result, the one-dimensional edge contact geometry is built between metal and graphene. The contact resistance of the fabricated one-dimensional metal-graphene edge contact is compared with the contact resistance of vertically stacked conventional metal-graphene contact.

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Au 전극과 pentacene 박막 계면의 contact resistance 측정 (Extraction of Contact Resistance in Interface Between Au Electrode and Pentacene Thin Film)

  • 정보철;류기성;김용규;송정근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.481-482
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    • 2006
  • We fabricated pentacene organic thin film transistor with good uniformity. And we extracted contact resistance in organic thin film transistors from the plot of the inverse of drain current versus channel length by extrapolating the curve to a channel length of zero, and multiplying by drain-source voltage. Extracted contact resistance is about $70K{\Omega}$ at gate-drain voltage of -20 V

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손상 감지 모니터링을 위한 탄소섬유 복합재료와 인쇄된 은 전극 사이의 접촉저항 평가 (Evaluation of Contact Resistance between Carbon Fiber/Epoxy Composite Laminate and Printed Silver Electrode for Damage Monitoring)

  • 전은범;;김학성
    • 비파괴검사학회지
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    • 제34권5호
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    • pp.377-383
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    • 2014
  • 위치 감응형 전극 네트워크(addressable conducting network, ACN)는 탄소섬유 복합재료와 전극 사이의 접촉저항을 통해 구조물의 손상 감지가 가능하다. 손상 감지를 위한 위치 감응형 전극 네트워크의 신뢰성을 향상시키기 위해서는 전극과 복합재료 사이의 접촉저항이 최소화되어야 한다. 본 연구에서는 은 나노 전극을 탄소섬유 복합재료 위에 인쇄전자기술을 이용하여 제작하였다. 은 전극이 형성된 복합재료는 은 나노 잉크의 소결온도와 복합재료의 표면거칠기에 따라 제작되었으며, 이에 따른 접촉저항을 측정하였다. 또한, 전자주사현미경(scanning electron microscope, SEM)을 통해 전극과 복합재료 사이의 계면을 관찰하였다. 본 연구를 통해, 은 나노 잉크의 소결온도가 $120^{\circ}C$, 복합재료의 표면거칠기가 0.230a일 때, $0.3664{\Omega}$의 최소 접촉저항을 나타냈다.

광유도 전해 도금법을 이용한 결정질 실리콘 태양전지용 Ni/Cu 전극 형성 (Formation of Ni / Cu Electrode for Crystalline Si Solar Cell Using Light Induced Electrode Plating)

  • 홍혜권;박정은;조영호;김동식;임동건;송우창
    • 융복합기술연구소 논문집
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    • 제8권1호
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    • pp.33-39
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    • 2018
  • The screen printing method for forming the electrode by applying the existing pressure is difficult to apply to thin wafers, and since expensive Ag paste is used, it is difficult to solve the problem of cost reduction. This can solve both of the problems by forming the front electrode using a plating method applicable to a thin wafer. In this paper, the process conditions of electrode formation are optimized by using LIEP (Light-Induced Electrode Plating). Experiments were conducted by varying the Ni plating bath temperature $40{\sim}70^{\circ}C$, the applied current 5 ~ 15 mA, and the plating process time 5 ~ 20 min. As a result of the experiment, it was confirmed that the optimal condition of the structural characteristics was obtained at the plating bath temperature of $60^{\circ}C$, 15 mA, and the process time of 20 min. The Cu LIEP process conditions, experiments were conducted with Cu plating bath temperature $40{\sim}70^{\circ}C$, applied voltage 5 ~ 15 V, plating process time 2 ~ 15 min. As a result of the experiment, it was confirmed that the optimum conditions were obtained as a result of electrical and structural characteristics at the plating bath temperature of $60^{\circ}C$ and applied current of 15 V and process time of 15 min. In order to form Ni silicide, the firing process time was fixed to 2 min and the temperature was changed to $310^{\circ}C$, $330^{\circ}C$, $350^{\circ}C$, and post contact annealing was performed. As a result, the lowest contact resistance value of $2.76{\Omega}$ was obtained at the firing temperature of $310^{\circ}C$. The contact resistivity of $1.07m{\Omega}cm^2$ can be calculated from the conditionally optimized sample. With the plating method using Ni / Cu, the efficiency of the solar cell can be expected to increase due to the increase of the electric conductivity and the decrease of the resistance component in the production of the solar cell, and the application to the thin wafer can be expected.

바나듐 레독스 흐름전지용 접촉저항 감소 일체형 전극-분리판 조립체 개발 (Development of an Integrated Electrode-bipolar Plate Assembly with Reduced Contact Resistance for Vanadium Redox Flow Battery)

  • ;임준우
    • Composites Research
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    • 제37권3호
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    • pp.190-196
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    • 2024
  • 분리판은 바나듐 레독스 흐름전지(VRFB) 스택 내 셀의 전기적 통로 및 구조적 지지 역할 수행하는 매우 중요한 부품 중 하나이다. 흑연 소재는 전기 전도성이 뛰어나 분리판에 주로 사용되지만, 셀 스택에서 전극과 분리판 사이에 높은 계면 접촉 저항(ICR)이 발생하여 VRFB의 성능에 심각한 제한이 존재한다. 본 연구에서는 ICR의 한계를 해결할 수 있는 일체형 전극-분리판 조립체를 개발하는 것을 목표로 하였다. 일체형 조립체는 핫 프레스 방법을 활용하여 열가소성 및 열경화성 폴리머와 단일 탄소 펠트를 사용하여 제작하였다. 실험 결과, 일체형 조립체가 연속적인 전기 경로로 인해 감소된 전체 저항을 나타냄을 확인하였다. 또한, 충/방전 셀 테스트 결과에서 일체형 조립체는 향상된 셀 성능을 보여주었다. 따라서 개발된 일체형 전극-분리판 조립체는 기존의 분리판 및 전극 조립체를 대체할 수 있을 것으로 판단된다.