• Title/Summary/Keyword: effective channel length

Search Result 133, Processing Time 0.03 seconds

Longitudinal Thermal Dispersion Enhancement by Oscillating Flow in a Grooved Channel (그루브 채널에서 왕복 유동에 의한 열확산 촉진에 관한 연구)

  • Kim, Seo-Young;Kim, Su-Hyeon;Kang, Byung-Ha
    • Transactions of the Korean Society of Mechanical Engineers B
    • /
    • v.29 no.10 s.241
    • /
    • pp.1075-1082
    • /
    • 2005
  • The characteristics of longitudinal dispersion enhancement by the flow oscillation are numerically studied according to various groove geometries in a 2-D channel in the present study. The length of expanded section l$_{1}$/h$_{1}$ is varied from 0 to 8.75. The oscillating flow condition is given at both side ends, i.e., u = Asin ($2{\pi}ft$) The non-dimensional temperatures at both side ends are set to zero. The bottom and top walls are adiabatic. The local heat sources are located at the middle of the groove wall. In order to solve the governing equations, the SIMPIER algorithm is employed. The present results indicate that maximum longitudinal thermal dispersion can be achieved when the area ratio of the expanded section to the contracted section in the grooved channel becomes 1.

The Electrical Properties of Single-silicon TFT Structure with Symmetric Dual-Gate for kink effect suppression

  • Lee, Deok-Jin;Kang, Ey-Goo
    • Journal of the Korea Computer Industry Society
    • /
    • v.6 no.5
    • /
    • pp.783-790
    • /
    • 2005
  • In this paper, we have simulated a Symmetric Dual-gate Single-Si TFT which has three split floating n+ zones. This structure reduces the kink-effect drastically and improves the on-current. Due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by a floating n+ region, This structure allows an effective reduction of the kink-effect depending on the length of two sub-channels. The on-current of the proposed dual-gate structure is 0.9mA while that of the conventional dual-gate structure is 0.5mA at a 12V drain voltage and a 7V gate voltage. This result shows a 80% enhancement in on-current. Moreover we observed the reduction of electric field in the channel region compared to conventional single-gate TFT and the reduction of the output conductance in the saturation region. In addition, we also confirmed the reduction of hole concentration in the channel region so that the kink-effect reduces effectively.

  • PDF

Degradation of short channel poly-Si TFTs due to electrical stress (짧은채널 길이의 다결정 실리콘박막트랜지스터의 전기적 스트레스에 대한연구)

  • Choi, K.Y.;Kim, Y.S.;Han, M.K.
    • Proceedings of the KIEE Conference
    • /
    • 1994.07b
    • /
    • pp.1442-1444
    • /
    • 1994
  • The short channel poly-Si TFT is important in aspect of transistor characteristics, packing density and aperture ratio. In this paper, we have reported the degradation phenomena of short channel poly-Si TFT's which had significantly degraded device parameters, such as threshold voltage shift and a great asymmetric degradation, due to gate and drain electrical stress. The reduced effective channel length and expanded depletion region may be the main reason of these significant device parameters.

  • PDF

Electrical sensing of SOI nano-wire BioFET by using back-gate bias (Back-gate bias를 이용한 SOI nano-wire BioFET의 electrical sensing)

  • Jung, Myung-Ho;Ahn, Chang-Geun;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.06a
    • /
    • pp.354-355
    • /
    • 2008
  • The sensitivity and sensing margin of SOI(silicon on insulator) nano-wire BioFET(field effect transistor) were investigated by using back-gate bias. The channel conductance modulation was affected by doping concentration, channel length and channel width. In order to obtain high sensitivity and large sensing margin, low doping concentration, long channel and narrow width are required. We confirmed that the electrical sensing by back-gate bias is effective method for evaluation and optimization of bio-sensor.

  • PDF

Bipolar Characteristics of Organic Field-effect Transistor Using F16CuPc with Active Layer ($F_{16}CuPC$를 활성층으로 사용한 유기전계효과트랜지스터의 바이폴라 특성연구)

  • Lee, Ho-Shik;Park, Young-Pil;Cheon, Min-Woo;Kim, Tae-Gon;Kim, Young-Phyo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.06a
    • /
    • pp.303-304
    • /
    • 2009
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine. ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

  • PDF

Electrical Properties of Field Effect Transistor using F16CuPc (F16CuPc를 이용한 Field Effect Transistor의 전기적 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil;Cheon, Min-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.11a
    • /
    • pp.389-390
    • /
    • 2008
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

  • PDF

A New Scaling Theory for the Effective Conducting Path Effect of Dual Material Surrounding Gate Nanoscale MOSFETs

  • Balamurugan, N.B.;Sankaranarayanan, K.;Suguna, M.
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.8 no.1
    • /
    • pp.92-97
    • /
    • 2008
  • In this Paper, we present a scaling theory for dual material surrounding gate (DMSGTs) MOSFETs, which gives a guidance for the device design and maintaining a precise subthreshold factor for given device parameters. By studying the subthreshold conducting phenomenon of DMSGTs, the effective conductive path effect (ECPE) is employed to acquire the natural length to guide the design. With ECPE, the minimum channel potential is used to monitor the subthreshold behavior. The effect of ECPE on scaling factor significantly improves the subthreshold swing compared to conventional scaling rule. This proposed model offers the basic designing guidance for dual material surrounding gate MOSFETs.

Properties of FET using Activative Materials with F16CuPc (F16CuPc를 활성층으로 사용한 FET의 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.04b
    • /
    • pp.43-44
    • /
    • 2009
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

  • PDF

Electrical Properties of FET using F16CuPc (F16CuPc를 이용한 FET의 전기적 특성 연구)

  • Lee, Ho-Shik;Park, Young-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.06a
    • /
    • pp.504-505
    • /
    • 2008
  • We fabricated organic field-effect transistors (OFETs) based a fluorinated copper phthalocyanine ($F_{16}CuPc$) as an active layer. And we observed the surface morphology of the $F_{16}CuPc$ thin film. The $F_{16}CuPc$ thin film thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in $F_{16}CuPc$ FET and we calculated the effective mobility.

  • PDF

Electrical Properties of CuPc FET with Different Substrate Temperature

  • Lee, Ho-Shik;Park, Yong-Pil;Cheon, Min-Woo
    • Transactions on Electrical and Electronic Materials
    • /
    • v.8 no.4
    • /
    • pp.170-173
    • /
    • 2007
  • Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated the organic field-effect transistor based a copper phthalocyanine (CuPc) as an active layer on the silicon substrate. The CuPc FET device was made a topcontact type and the substrate temperature was room temperature and $150^{\circ}C$. The CuPc thickness was 40 nm, and the channel length was $50{\mu}m$, channel width was 3 mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in CuPc FET and we calculated the effective mobility with each device. Also, we observed the AFM images with different substrate temperature.