• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.202-207
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• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

• Journal of Advanced Navigation Technology
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• v.7 no.1
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• pp.1-5
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• 2003

In this paper, the output power level and phase noise property of nine conventional push-push FET DROs (Dielectric Resonator Oscillator) have been experimentally investigated by adding one more identical DR at the drain port. The nine oscillators designed to generate 20 GHz from 10 GHz fundamental frequency, have been tested for each of three different power combiners at the output port. It has been observed that the output power level of the push-push FET DROs can be improved by placing the DR while maintaining their phase noise characteristics were approximately the same as before adding the DR.

• Journal of Sensor Science and Technology
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• v.4 no.4
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• pp.29-40
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• 1995

In this paper, the noise equivalent cicuits that is necessary to the formulation of D.C. and noise characteristics, residual component and input capacitance so as to analyze on the noise factors of the SIT is proposed. The simplest noise equivalent circuit is the model representing the mechanism of the SIT and the measured values in this model were found as small as the values of the shot-noise. In the source resistance inserted equivalent circuit is conformed that the shot-noise will be reduced by the negative-feedback effect of the source resistance. In oder to analyze the correct noise reduction factor, I proposed the equivalent circuit which the formulas of the source and drain resistance was induced. In the experiment which affirm the equivalent circuits, the influence of the signal source resistance and output load resistance on the residual component is small and the residual component can be expressed by the equivalent input noise resistance. Moreover, the input capacitance is 13.6 pF when the load resistance is $0{\Omega}$ and the capacitance which does not concern with the SIT operation directly, that is, gate wire etc, is 10pF or so.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.3 no.1
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• pp.18-25
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• 1978

The 1/f noise spectrum of short-circuited output drain current due to the Shockley-Read-Hal] recombination centers with a single lifetime in homogeneous nondegenerate MOS-field effcte transtors with n-type channel is calculated under the assumptions that the quasi-Fermi level for the carriers in each energy band can not be defined if we include the fluctuation for time varying quantities. and so 1/f noise is a majority carrier effect. Under these assumptions the derived 1/f noise in this paper show some essential features of the 1/f noise in MOS-field effect transistors. That is, it has no lowfrequency plateau and is proportionnal to the channel cross area A and to the driain bias voltage Vd and inversely proportional to the channel length L3 in MOS field effect transistors. This model can explain the discrepancy between the transition frequency of the noise spectrum from 1/f- response to 1/f2 and the frequency corresponding to the relaxation time related to the surface centers in p-n junction diodes. In this paper the results show that the functional form of noise spectrum is greatly influenced by the functional forms of the electron capture probability cn (E) and the relaxation time r (E) for scattering and the case of lattice scattering show to be responsible for the 4 noise in MOS fold effect transistors. So we canconclude that the source of 1/f noise is due to lattice scattering.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.7
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• pp.545-549
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• 2010

Low-frequency noise (1/f noise) has been measured in order to analyze the Vth instability of ZnO TFTs having two different active layer thicknesses of 40 nm and 80 nm. Under electrical stress, it was found that the TFTs with the active layer thickness of 80 nm shows smaller threshold voltage shift (${\Delta}V_{th}$) than those with thickness of 40 nm. However the ${\Delta}V_{th}$ is completely relaxed after the removal of DC stress. In order to investigate the cause of this threshold voltage instability, we accomplished the 1/f noise measurement and found that ZnO TFTs exposed the mobility fluctuation properties, in which the noise level increases as the gate bias rises and the normalized drain current noise level($S_{ID}/{I_D}^2$) of the active layer of thickness 80 nm is smaller than that of active layer thickness of thickness 40 nm. This result means that the 80 nm thickness TFTs have a smaller density of traps. This result correlated with the physical characteristics analysis performmed using XRD, which indicated that the grain size increases when the active layer thickness is made thicker. Consequently, the number of preexisting traps in the device increases with decreasing thickness of the active layer and are related closely to the $V_{th}$ instability under electrical stress.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.7 no.2
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• pp.178-185
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• 1996

In this paper, a theoretical analysis of a wide band distributed mixer using a dual-gate GaAs MESFET's(DGFET) is introduced. Based on low noise mixer mode(LNM) region modeling of DGFET, variation of g/sub m/ and conversion gain are presented versus bias. The distributed mixer is composed of drain and gate transmission line, m-derived image impedance matching circuits at each input and output port, and DGFET's. Through computer simulation, wide-band characteristics of designed distributed mixer are confirmed. And, it is certificated that LO/RF isolation between gate 1 and gate 2 is obtained more than 15dB.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.114-120
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• 1994

We have been successfully fabricated the low nois HEMT device with AlGaAs and GaAs structure. The epitazial layer with n-type AlgaAs and undoped GaAs was grown by molecular beam epitaxy(MBE) system. Ohmic resistivity of the ource and drain contact is below 5${\times}10^{6}{\Omega}{\cdot}cm^{2}$ by the rapid thermal annealing (RTA) process. The ideality factor of the Schottky gate is below 1.6 and the gate material was Ti/Pt/Au. The HEMTs with 0.25$\mu$m-long and 200$\mu$m-wide gates have exhibited a noise figure of 0.65dB with associated gain of 9dB at 12GHz, and a transconductance of 208mS/mm.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.81-82
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• 2007

This paper presents a WLAN band active monopole antenna which is made of a CPW-fed monopole antenna and a low noise amplifier implemented on single-layer low-temperature co-fired ceramic (LTCC) substrate. Planar active antenna measure return loss and power test. (drain voltage = 4V, gate voltage = -0.6V). The bandwidth, is 540MHz, return loss is -38dB.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.29-32
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• 2000

In this paper, an analytical model for I-V characteristics of a HEMTs is Proposed. The developed model takes into account the temperature dependence of drain current. In high-speed ICs for optical communication systems and mobile communication systems, temperature variation affects performance; for example the gain, efficiency in analog circuits and the delay time, power consumption and noise mrgin in digital circuits. To design such a circuit taking into account the temperature dependence of the current-voltage characteristic is indispensible. This model based on the analytical relation between surface carrier density and Fermi potential including temperature dependent coefficients.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1955-1957
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• 2003

This paper presents a novel defected ground structure (DGS) and its application to a microwave oscillator. The presented oscillator is designed so as to use the suggested defected ground structure as a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM calculations and simple circuit analysis method. The implemented 1.07 GHz oscillator exhibits 0 dBm output power with over 15% dc-to-RF power efficiency and -106 dBc/Hz phase noise at 100 kHz offset from carrier.