• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.465-469
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• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.3
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• pp.341-350
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• 1996

The CdS thin films are grown on quartz plate by hot wall epitaxy. The source and substrate temperature is $590^{\circ}C$ and $400^{\circ}C$ respectively, and thickness of the film is $2.5\;\mu\textrm{m}$. Using extrapolation method of X-ray diffraction patterns for the CdS thin film, it was found hexagonal structure whose lattice constant a and c were $4.137\;{\AA}$ and $6.713\;{\AA}$, respectively. Hall effect on this sample was measured by the method of van der Pauw and studied on cattirer density and mobility depending on temperature. From hall data, the mobility was likely to be decreased by piezoelectric scattering in the temperature range 30 K to 200 K and by polar optical scattering in the temperature range 200 K to 293 K. In order to explore the applicability as a photoconductive cell we measured the sensitivity ($\gamma$), the ratio of photocurrent to darkcurrent (pc/dc), maximum allowable power dissipation (MAPD), spectral response and response time. The results indicated that for the samples annealed in Cu vapor the photoconductive characteristics are the best. Then we obtained the sensitivity of 0.99, the value of pc/dc of $9.42{\times}10^{6}$, the MAPD of 318 mW, and the rise and decay time of 10 ms and 9 ms, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.10A
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• pp.912-921
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• 2005

Optical burst switching(OBS) is a promising solution for building terabit optical routers and realizing If over WDM. Channel scheduling Algorithm for reduce contention is one of the major challenges in OBS. We address the issue of how to provide basic burst channel scheduling in optical burst switched WDM networks with fiber delay lines(FDLs). In OBS networks the control and payload components or a burst are sent separately with a time gap. If CHP arrives to burst switch node, because using scheduling algorithm for data burst, reservation resources such as wavelength and transmit data burst without O/E/O conversion, because contention and void between burst are happened at channel scheduling process for data burst that happened the link utilization and bust drop probability Existent proposed methods are become much research to solve these problems. Propose channel scheduling algorithm that use Release Time of bust to emphasize clearance between data and data dissipation that is happened in data assignment in this treatise and maximize bust drop probability and the resources use rate (RTUC : Release Time Unscheduled Channel). As simulation results, Confirmed that is more superior in terms of data drop and link utilization than scheduling algorithm that is proposed existing. As simulation results, confirmed improved performance than scheduling algorithm that is proposed existing in terms of survival of burst, efficiency resource and delay. However, In case load were less, degradation confirmed than existent scheduling algorithm relatively, and confirmed that is superior in data drop aspect in case of load increased.

• Journal of the Korean Ceramic Society
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• v.34 no.2
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• pp.202-208
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• 1997

Bi-layered SrBi2Ta2O9(SBT) films were deposited on Pt/Ti/SiO2/Si sibstrates by rf magnetron sputt-ering at room temperature and then were annealed at 75$0^{\circ}C$, 80$0^{\circ}C$ and 85$0^{\circ}C$ for 1 hour in oxygen at-mosphere. The film composition of SrBi2Ta2O9 was obtained after depositing at room temperature and annealing at 80$0^{\circ}C$. Excess 20mole% Bi2O3 and 30 mole% SrCO3 were added to the target to compensate for the lack of Bi and Sr in SBT film. 200 nm thick SBT film exhibited and dense microstructure, adielectric constant of 210, and a dissipation factor of 0.05 at 1 MHz frequency. The films exhibited Curie temperature of 32$0^{\circ}C$ and a dielectric constant of 314 at that temperature under 100 kHz frequency. The remanent polarization(2Pr) and the coercive field(2Ec) of the SBT films were 9.1 $\mu$C/$\textrm{cm}^2$ and 85 kV/cm at an applied voltage of 3V, resspectively and the SBT film showed a fatigue-free characteristics up to 1010 cy-cles under 5V bipolar pulse. The leakage current density of the SBT film was about 7$\times$10-7A/$\textrm{cm}^2$ at 150 kV/cm. Fatigue-free SBT films prepared by rf magnetron sputtering can be suitable for application to non-volatile memory device.

• Journal of the Korea Concrete Institute
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• v.19 no.4
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• pp.401-409
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• 2007

The objective of this research is to provide better knowledge on the behavior of strong axis SRC column-RC beam joint, supported by experimental results, that can be broadly applicable to many structures. For this purpose, firstly literature reviews and field survey were made to classify the most commonly used for these types of joints. Then, experimental program was designed and performed including 6 SRC column-RC beam joint specimens designed with various joint details. Using the experimental results obtained from the quasi-static cyclic tests, structural performances of the joints such as hysteretic curves, maximum strength capacities, strength degradation beyond the maximum strength, ductilities, and energy dissipation capacities were investigated. Test results showed that specimens with wide beam shape (RCW-P, RCW-W, RCW-F) and T beam shape (RCT-W) showed better structural performances than the bracket type specimens (HBR-L, HBR-S). These specimens also revealed to have higher strength capacities than the nominal design strength. However, H beam bracket type specimens (HBR-L, HBR-S) need further study both analytically and experimentally to verify the reason for unexpected structural performances.

• Journal of the Korea Concrete Institute
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• v.19 no.4
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• pp.411-420
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• 2007

The applicability of headed bars in exterior beam-column joints under reversed cyclic loading was investigated. A total of ten pullout tests were first performed to examine pullout behavior of headed bars subjected to monotonic and cyclic loading with test variables such as connection type between head and bar stem (weld or no weld), loading methods (monotonic or cyclic loading), and head shape (small or large circular head and square head). Two full-scale beam-column joint tests were then performed to compare the structural behavior of exterior beam-column joints constructed using two different reinforcement details: i.e. $90^{\circ}$ standard hooks and headed bars. Both joints were designed following the recommendations of ACI-ASCE Committee 352 for Type 2 performance: i.e. the connection is required to dissipate energy through reversals of deformation into inelastic range. The pullout test results revealed that welded head to the stem did not necessarily result in increased pullout strength when compared to non-welded head. Relatively large circular head resulted in higher peak load than smaller circular and square head. Both beam-column joints with conventional $90^{\circ}$ hooks and headed bars behaved similarly in terms of crack development, hysteresis curves, and peak strengths. The joint using the headed bars showed better overall structural performance in terms of ductility, deformation capacity, and energy dissipation. These experimental results demonstrate that the headed bars using relatively small head can be properly designed far use in external beam-column joint.

• Journal of the Korea Concrete Institute
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• v.20 no.3
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• pp.271-282
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• 2008

Specific joint devices composed of end-plates and through bolts are under development to assemble steel beams to PC columns efficiently by dry construction method for the PCS structural system, of which major structural components are precast concrete columns and steel beams. Seismic performance of the joint devices had been evaluated by experimental tests in the previous studies and it was showed that all the performance requirements regarding to strength deterioration, stiffness degradation and energy dissipation capacity were satisfied to the criteria of ACI requirements, but the initial stiffness was not. In order to find out possible causes of the insufficient rigidity of the joint devices and provide the proper measures to improve the performance of the joint accordingly, numerical analyses were carried out by using ABAQUS. Parameters, such as thickness of neoprene pad, conditions of surface between PC column and end-plate, magnitude of pretension forces of through bolts, stiffness of end-plate were taken into consideration. As the result, it was found that the rigidity of the PCS system was negatively affected by the magnitude of initial gaps between PC columns and end-plates, and insufficient stiffness of neoprene fillers and end plates. In order to improve the initial stiffness performance of the joints, measures such as increase of the magnitude of pretension forces on through bolts and increase of the stiffness of end-plate by reducing the bolt pitch and providing adequate stiffeners are recommended.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.1-9
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• 2009

In this paper, a small area 12-bit 300MSPS CMOS Digital-to-Analog Converter(DAC) is proposed for display systems. The architecture of the DAC is based on a current steering 6+6 segmented type, which reduces non-linearity error and other secondary effects. In order to improve the linearity and glitch noise, an analog current cell using monitoring bias circuit is designed. For the purpose of reducing chip area and power dissipation, furthermore, a noble self-clocked switching logic is proposed. To verify the performance, it is fabricated with $0.13{\mu}m$ thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective chip area is $0.26mm^2$ ($510{\mu}m{\times}510{\mu}m$) with 100mW power consumption. The measured INL (Integrated Non Linearity) and DNL (Differential Non Linearity) are within ${\pm}3LSB$ and ${\pm}1LSB$, respectively. The measured SFDR is about 70dB, when the input frequency is 15MHz at 300MHz clock frequency.

• Journal of IKEEE
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• v.2 no.2 s.3
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• pp.278-284
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• 1998

This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.631-637
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• 2003

We have evaluated structural and electric, ferroelectric properties of PZT(30/70) thick film prepared by using 1,3-propanediol based sol-gel method on Pt/Ti/SiO$_2$/Si substrates. Rapid thermal annealing (RTA) is used to reduce the thermal stress and final furnace annealing is processed at $650^{\circ}C$. As the results of SEM analysis, we find that we get 350 nm in thickness for one coating and 1 $\mu$m for three times of coating. In the results of C-D analysis at 1 kHz, dielectric constant ($\varepsilon$$_{r}$) and dissipation factor were 886 and 0.03, respectively. C-V curve is shaped as a symmetrical butterfly. Leakage current density at 200 kV/cm is 1.23${\times}$10$^{-5}$ A/cm$^2$ and in the results of hysteresis loops measured at 150 kV/cm, the remnant polarization (P$_{r}$) and the coercive field (E$_{c}$) are 33.8 $\mu$C/cm$^2$ and 56.9 kV/cm, respectively. PZT(30/70) thick film exhibits relatively good ferroelectric, electric properties.s..