• 제목/요약/키워드: direct-sequence spread-spectrum

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사물지능 통신을 위한 고효율 저복잡도 대역 확산 알로하 기법 (High-Efficiency and Low-Complexity Spread Spectrum ALOHA for Machine-to-Machine Communications)

  • 노홍준;박형원;임재성
    • 한국통신학회논문지
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    • 제41권12호
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    • pp.1700-1706
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    • 2016
  • 본 논문은 동시 전송 가능한 사물지능 통신 트래픽의 수를 늘리기 위하여 doubly truncated cyclic code shift keying (DTCCSK)을 활용한 대역 확산 알로하 기법을 제안한다. 제안하는 DTCCSK는 정사각형으로 표시되는 cyclic code shift keying 코드셋의 우측과 하단을 절삭함으로써 생성 가능하며, spreading factor와 심볼 길이를 자유롭게 설계할 수 있는 특징을 가진다. 또한 DTCCSK는 대역 확산 알로하의 변복조 기법으로 주로 사용되는 direct sequence 보다 높은 주파수 효율을 보이면서도 M-ary 시그널링 기법에 비해서는 낮은 구현 복잡도로 구현이 가능하다. 본 논문은 사물지능 통신을 위해 대역 확산 알로하를 채택한 S-band mobile interactive multimedia 표준을 참고하여 시뮬레이션 환경을 구성하였고 DTCCSK의 성능을 검증하였다.

직접대역확산방식 기술조사 및 분석 (Technical Survey and Analysis of DSSS)

  • 임유철;마근수;김명환;이재득
    • 항공우주기술
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    • 제10권1호
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    • pp.45-53
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    • 2011
  • 본 연구는 직접대역확산방식(DSSS)에 대한 기술검토 자료로서 현재까지 직접대역확산방식이 적용되고 있는 통신시스템들을 알아보고 각각의 주파수, 코드길이, 확산이득, 데이터 전송속도 등의 대역확산 규격에 대하여 소개한다. 또한 발사체에 직접대역확산방식을 적용하기 위해 고려되어야 하는 사항에 대하여 알아보고 특히 도플러천이(Doppler Shift)가 직접대역확산방식의 동기획득에 미치는 영향에 대하여 기존에 연구된 사례들을 조사하고 정리하였다. 도플러천이에 대한 영향을 다루는 이유는 발사체와 같이 빠르게 이동하는 시스템에 있어서 도플러천이는 DSSS시스템의 코드추적에 주요오차요인으로 작용한다. 따라서 시스템에 적용을 위해서는 이에 대한 검토가 필요하다.

Adaptive Filter Based PN Code Phase Acquisition Under Frequency Selective Rayleigh Fading Channels

  • Lee, Donghoon;Kim, Jeongchang;Cheun, Kyungwhoon
    • 한국통신학회논문지
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    • 제38A권5호
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    • pp.416-425
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    • 2013
  • A hybrid PN code phase acquisition system based on a least-mean-square adaptive filter, interpreted as a channel estimator is proposed and analyzed for direct-sequence spread-spectrum systems under frequency selective Rayleigh fading channels. Closed form expressions are derived for the filter tap weights and detection/false alarm probabilities. Compared to previously proposed systems, the proposed system achieves smaller mean acquisition times, is more robust to the operating signal-to-noise ratio and allows for multiplication free tap weight updates.

An Efficient Code Acquisition Scheme for DSSS-based Real-Time Locating Systems

  • Lim, Jong-Tae;Park, Hyung-Rae
    • 한국통신학회논문지
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    • 제36권1A호
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    • pp.41-48
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    • 2011
  • This paper proposes an efficient code acquisition scheme for direct-sequence spread spectrum (DSSS) based real-time locating systems (RTLS). The proposed scheme employs multiple bit integration to significantly decrease false alarms when no packet signal is transmitted and increase the detection probability when the RTLS tags are excited. The performance of the proposed code acquisition scheme is analyzed and numerically evaluated, and compared with those of single-dwell and traditional double-dwell code acquisition schemes. The simulation results show that the proposed multiple-bit integration scheme outperforms single-dwell and double-dwell schemes.

다중 경로 채널 시스템에서 신경회로망을 이용한 간섭 신호 제거 (Rejection of Interference Signal Using Neural Network in Multi-path Channel Systems)

  • 석경휴
    • 한국음향학회:학술대회논문집
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    • 한국음향학회 1998년도 학술발표대회 논문집 제17권 1호
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    • pp.357-360
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    • 1998
  • DS/CDMA system rejected narrow-band interference and additional White Gaussian noise which are occured at multipath, intentional jammer and multiuser to share same bandwidth in mobile communication systems. Because of having not sufficiently obtained processing gain which is related to system performance, they were not effectively suppressed. In this paper, an matched filter channel model using backpropagation neural network based on complex multilayer perceptron is presented for suppressing interference of narrow-band of direct sequence spread spectrum receiver in DS/CDMA mobile communication systems. Recursive least square backpropagation algorithm with backpropagation error is used for fast convergence and better performance in matched filter receiver scheme. According to signal noise ratio and transmission power ratio, computer simulation results show that bit error ratio of matched filter using backpropagation neural network improved than that of RAKE receiver of direct sequence spread spectrum considering of con-channel and narrow-band interference.

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An Analysis on the State-Dependent Nature of DS/SSMA Unslotted ALOHA

  • Park Seong-Yong;Lee Byeong-Gi
    • Journal of Communications and Networks
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    • 제8권2호
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    • pp.220-227
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    • 2006
  • In this paper, we present a novel approach to analyze the throughput of direct-sequence spread spectrum multiple access (DS/SSMA) unslotted ALOHA system. In the unslotted system, the departure rate of interfering transmissions is proportional to the number of current interferers that can be regarded as the system state. In order to model this state-dependency, we introduce a two-dimensional state transition model that describes the state transition of the system. This model provides a more rigorous analysis tool for the DS/SSMA unslotted ALOHA systems with both fixed and variable packet lengths. Numerical results reveal that this analysis yields an accurate system performance that coincides with the simulation results. Throughout the analysis we have discovered that the state-dependency of the departure rate causes interference averaging effect in the unslotted system and that this effect yields a higher throughput for the unslotted system than for the slotted system when supported by a strong channel coding.

대역 제한된 직접 시퀀스 CDMA 확산 대역 신호를 위한 전 디지탈 부호 획득 및 추적 루우프 FPGA 구현 (A FPGA implementation of a full-digital code acquisition/Tracking Loop for the CDMA direct-sequence spread-spectrum signals)

  • 김진천;박홍준;임형수;전경훈
    • 전자공학회논문지A
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    • 제33A권5호
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    • pp.165-171
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    • 1996
  • A noncoherent full-digital PN(pseudo noise) code acquisition/tracking loop has been presetned and implemented in FPGA for the CDMA band-limited direct-sequence spread-spectrum (DS-SS) signals. It employs a simple decimator to control of local PN code phase to lower the hardware cost, and a second order loop to enable the more accurate tracking. The proposed acquisition/tracking loop has been designed in RTL-level VHDL, synthesized into logic gates using the design analyzer of synopsys software, implemented in an ALTERA FPGA chip, and tested. The number of logic gates used in the implemented FPGA chip is around 7000. The functionality has been verified using a PC interface circuitry and a logic analyzer.

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다중경로 페이딩 전송로에서 직접시퀀스 확산대역 시스템이 추적을 위한 TDL의 성능분석 (Performance analysis of TDL for tracking of a direct-sequence spread-spectrum system in a multipath fading channel)

  • 김진영;이재홍
    • 전자공학회논문지A
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    • 제33A권3호
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    • pp.10-17
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    • 1996
  • The performance of tau-dither loop (TDL) is evaluated for a direct-sequence spread-spectrum system in a multipath fading channel. The multipath fading channel is modeled as a two-ray rayleight fading channel. The code tracking perfomrance of TDL is analyzed in terms of tracking jitter and mean-tiem-to-lose-lick (MTLL). The tracking jitter performance is degraded while MTLL perfomrance is improved with increasing discriminator offset and decreasing power ratio of main to second paths. It is shown that for a large bit SNR, the effect of multipath fading becomes more significant. And it is also shown that tracking jitter and MTLL performance is less sensitive to delay spacing and discriminator offset for a small bit SNR than for a large bit SNR.

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Noncoherent Unitary Space-Time Modulated DSSS Systems in Multipath Channels

  • Cheun, Kyung-Whoon;Kim, Jeong-Chang;Kim, You-Han;Choi, Soong-Yoon
    • Journal of Communications and Networks
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    • 제14권2호
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    • pp.206-212
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    • 2012
  • In this paper, in order to effectively apply unitary space-time modulation to the direct-sequence spread-spectrum multiple-access (DSSS-MA) networks, we propose a low-rate, noncoherent, unitary, and space-time modulated DSSS system supporting any number of transmit antennas based on Walsh matrices. The proposed scheme simultaneously performs bandwidth spreading and space-time coding and outperforms those using high-rate, conventional unitary space-time constellations. Furthermore, the proposed scheme allows for a simple detector structure based on fast Walsh transforms.

DSSS 수신기에서 동기탐색을 위한 고속 정합필터 (A High-Speed Matched Filter for Searching Synchronization in DSSS Receiver)

  • 송명렬
    • 한국통신학회논문지
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    • 제27권10C호
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    • pp.999-1007
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    • 2002
  • 본 논문에서는 DSSS (Direct Sequence Spread Spectrum) 수신기에서 초기동기 탐색에 사용될 수 있는 정합필터에 대해서 연구하였다. 하드웨어기술언어 (HDL)로 정합필터를 구현하기 위한 모델이 제시되었다. 제안된 모델은 고속 처리를 위해 병렬처리와 파이프라인 구조를 기반으로 하는데 환형버퍼, 곱셈기, 덧셈기, 코드참조표 등으로 구성되어 있다. 제안된 모델에 대해 성능을 분석하였고 일반적인 DSP (Digital Signal Processor)로 구현할 경우와 비교하였다. 제안된 모델을 FPGA (Field Programmable Gate Array)상에 구현하였고 타이밍 시뮬레이션 결과를 통해서 동작을 검증하였다.