• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.12 s.91
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• pp.1161-1167
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• 2004

The conventional PLL(phase locked loop) frequency synthesizer takes a long switching time because of the inherent closed-loop structure. The digital hybrid PLL(DH-PLL) which includes the open-loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are the serious problem because the DLT(digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO(voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit for the very small over-shoot and shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. The hardware complexity gets decreased to about $28\%,$ as compared with the conventional DH-PLL. The high speed switching characteristic of the frequency synthesis process can be verified by the computer simulation and the circuit implementation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.10A
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• pp.1590-1597
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• 2000

This paper describes a CMOS data recovery circuit using oversampling technique. Digital oversampling is done using a delay locked loop circuit locked to multiple clock periods. The delay locked loop circuit generates the vernier delay resolution less than the gate delay of the delay chain. The transition and non-transition counting algorithm for 4x oversampling was implemented for data recovery and verified through FPGA. The chip has been fabricated with 0.6um CMOS technology and measured results are presented.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.36 no.2
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• pp.107-113
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• 1987

A complete design of a new digital control circuit for a three-phase controlled rectifier is presented. The circuit consists of a gating signal generating ROM, down counter and adder. Proposed scheme is simple and quite adequate to the microprocessor-based digitally controlled systems. The basic principle and operation characteristics of the circuit are described and experimental-results show good dynamic performance. Synchronization problem with noisy reference is also discussed. The basic phylosophy developed can be extended to the other phase control system, e.g., cycloconverters, ac voltoge controllers, etc.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.419-421
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• 1996

We propose the digitized pressure sensor and the interface circuit to read directly the pressure signal in the digital form. The interface circuit has the control clock, comparator, and bit value decision circuit. The digitized sensor and interface circuit are integrated on the one chip using the post processing after IC fabrication. The dimension of the fabricated digitized pressure sensor is $3{\times}6{\times}1mm^3$.

• The Magazine of the IEIE
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• v.2 no.2
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• pp.37-42
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• 1975

Various factors which affect the linearity and accuracy of the ramp type analog-to-digital converter have been investigated experimentally. A suggestion hav been made in the determination of circuit parameters with the emphasis on the improvement of the linearity and accuracy in the ramp type analog-to-digital conveter.

• ETRI Journal
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• v.33 no.1
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• pp.121-124
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• 2011

Digital harmonics, which may reduce the radio frequency sensitivity of a system, can be coupled with an antenna in a mobile handset. This letter presents a decoupling method for increasing the isolation between digital harmonics on a flexible printed circuit board (FPCB) and an antenna in terms of the ground mode current and the concept of reaction. We model the signal and ground lines in an FPCB as a loop circuit exciting a ground mode current and demonstrate a simple but efficient decoupling method for reducing the excited ground mode current.

• Proceedings of the KWS Conference
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• 2000.04a
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• pp.99-102
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ WS FB DC/DC converter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.217-226
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• 1986

A method on the hardware implementation of the Multi-channel FIR digital filter using Digital Quarter Square Multiplication(DQSM) algorithm is proposed. This paper describes that ROM requirement can be reduced by using the double precision algorithm and the absolute value circuit, and also execution speed can be improved by reducing logic level steps of absolute value circuit. The frequency response of the four channel FIR digital filter implemented by the above method is quite agreeable with the frequency response simulated by Remez excahange algorithm.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.243-245
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• 2005

This paper presents a wired and wireless linked remote control system. Ethernet based network communication is used for long distance management and 2.4GHz RF network is adopted for the local area communication between the main network and the ballast. For the effective remote control and management including dimming using wired and wireless linked digital communication networks, control circuit of the ballast is implemented with fully digital circuit using MCU and EPLD. In this paper, the proper frame structure is proposed for the digital-remote lighting-control system and the detailed system configurations including fully digital controlled ballast for the induction lamp are described.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.289-289
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• 2010

Translation Characteristics of Digital Decoder utilizing the analog parallel processing circuit technology is designed. The fast parallel viterbi decoder system acted by a replacement of the conventional digital viterbi Decoder has good propagation. we are applied proposed analog viterbi decoder to decode PR signal for DVD and analyze the specific circuit and signal characteristics.