• Title/Summary/Keyword: digital signal processor

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Effective Elimination of False Alarms by Variable Section Size in CFAR Algorithm (CFAR 적용시 섹션 크기 가변화를 이용한 오표적의 효율적 제거)

  • Roh, Ji-Eun;Choi, Beyung-Gwan;Lee, Hee-Young
    • Journal of the Korea Institute of Military Science and Technology
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    • v.14 no.1
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    • pp.100-105
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    • 2011
  • Generally, because received signals from radar are very bulky, the data are divided into manageable size called section, and sections are distributed into several digital signal processors. And then, target detection algorithms are applied simultaneously in each processor. CFAR(Constant False Alarm Rate) algorithm, which is the most popular target detection algorithm, can estimate accurate threshold values to determine which signals are targets or noises within center-cut of section allocated to each processor. However, its estimation precision is diminished in section edge data because of insufficient surrounding data to be referred. Especially this edge problem of CFAR is too serious if we have many sections to be processed, because it causes many false alarms in most every section edges. This paper describes false alarm issues on MCA(Minimum Cell Average)-CFAR, and proposes a false alarm elimination method by changing section size alternatively. Real received data from multi-function radar were used to evaluate a proposed method, and we show that our method drastically decreases false alarms without missing real targets, and improves detection performance.

Application of Digital Signal Analysis Technique to Enhance the Quality of Tracer Gas Measurements in IAQ Model Tests

  • Lee, Hee-Kwan;Awbi, Hazim B.
    • Journal of Korean Society for Atmospheric Environment
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    • v.23 no.E2
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    • pp.66-73
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    • 2007
  • The introduction of tracer gas techniques to ventilation studies in indoor environments provides valuable information that used to be unattainable from conventional testing environments. Data acquisition systems (DASs) containing analogue-to-digital (A/D) converters are usually used to function the key role that records signals to storage in digital format. In the testing process, there exist a number of components in the measuring equipment which may produce system-based inference to the monitored results. These unwanted fluctuations may cause significant error in data analysis, especially when non-linear algorithms are involved. In this study, a pre-processor is developed and applied to separate the unwanted fluctuations (noise or interference) in raw measurements and to reduce the uncertainty in the measurement. Moving average, notch filter, FIR (Finite Impulse Response) filters, and IIR (Infinite Impulse Response) filters are designed and applied to collect the desired information from the raw measurements. Tracer gas concentrations are monitored during leakage and ventilation tests in the model test room. The signal analysis functions are introduced to carry out the digital signal processing (DSP) work. Overall the FIR filters process the $CO_2$ measurement properly for ventilation rate and mean age of air calculations. It is found that, the Kaiser filter was the most applicable digital filter for pre-processing the tracer gas measurements. Although the IIR filters help to reduce the random noise in the data, they cause considerable changes to the filtered data, which is not desirable.

A Study on the Design of the Digital Filter Bank Using the Wave Digital Filters (웨이브 디지탈 필터를 이용한 디지탈 필터뱅크의 설계에 관한 연구)

  • 임덕규;한인철;이재석;이종각
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.2
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    • pp.107-119
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    • 1988
  • An 8-channel digital filter bank with wave digital filters(WDF) is studied. Wave digital filtwr is automatically a directional filter. Using these properties, a new method for organizing the 8-channel digital filter bank is proposed. This will lead to enormous savings in memories for the digital signal processign chip.

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A Study On Improving the Performance of One Dimensional Systolic Array Processor for Matrix.Vector Operation using Sub-Matrix (부분행렬을 사용한 행렬.벡터 연산용 1차원 시스톨릭 어레이 프로세서 설계에 관한 연구)

  • Kim, Yong-Sung
    • The Journal of Information Technology
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    • v.10 no.3
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    • pp.33-45
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    • 2007
  • Systolic Array Processor is used for designing the special purpose processor in Digital Signal Processing, Computer Graphics, Neural Network Applications etc., since it has the characteristic of parallelism, pipeline processing and architecture of regularity. But, in case of using general design method, it has intial waiting period as large as No. of PE-1. And if the connected system needs parallel and simultaneous outputs, processor has some problems of the performance, since it generates only one output at each clock in output state. So in this paper, one dimensional Systolic Array Processor that is designed according to the dependance of data and operations using the partitioned sub-matrix is proposed for the purpose of improving the performance. 1-D Systolic Array using 4 partitioned sub-matrix has efficient method in case of considering those two problems.

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A study on digital PWM control of $3{\Phi}$ voltage-type inverter (3상 전압형 인버터의 디지털 PWM 제어에 관한 연구)

  • Seul, Nam-O;Kim, Young-Min
    • Proceedings of the KIEE Conference
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    • 1998.07b
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    • pp.585-587
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    • 1998
  • It is suggested that the PWM inverter is controlled by Digital Software Programming. VVVF(Variable Voltage Variable Frequency) inverter control being used by PWM control for driving the motor with speed-varying, makes the PWM pattern with calculating the output voltage and frequency, and with controlling the carrier and signal, so actually this method is difficult to correspond with driving the motor by using voltage-varying and frequency-varying. Therefore this research suggested the new algorithm controlled by micro processor which is already stored by various PWM form of output voltage by using fundamental data of the carrier and signal. The PWM wave can be controlled with real time by using extra hardware and digital software and to speed up program processing, the control signals to switch the power semi-conductor of three phase PWM inverter, simultaneously use the output signal by microprocessor and extra hardware, and control signal by software. In the end, this method was proved by applying to Three Phase Voltage-type Inverter.

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System Design for Real-Time Measuring of Power Quality and Harmonics Distortion using Digital Signal Processor (Digital Signal Processor를 이용한 실시간 전력 요소와 왜율 측정 시스템 설계)

  • kim, Geun-Jun;Kang, Bongsoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.7
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    • pp.1283-1289
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    • 2016
  • Electrical energy is the essential resource for modern society. Recently, the demand for power was significantly increased. Increase of power demand has lead to a decrease in the power quality. Power quality in modern society has been an important factor that can cause a major problem throughout the home and general industry. Therefore, we need a system for preventing the power quality problems. To avoid power issues, it is important that the measurement of the power quality and initial response. In this paper, we propose real-time power quality measurement system and harmonics monitoring system. We design the system using DM240001 board include dsPIC33FJ256GP710A of microchip. This system can adapt three-phase three-wire system. And optimized the algorithm, we can measure momentary changes of the power system. In addition, designed system can measure harmonics distortion like to VTHD, ITHD and ITDD for 31th harmonics.

Implementation of LTE Transport Channel on Multicore DSP Software Defined Radio Platform (멀티코어 DSP 기반 소프트웨어 정의 라디오 플랫폼을 활용한 LTE 전송 채널의 구현)

  • Lee, Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.4
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    • pp.508-514
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    • 2020
  • To implement the continuously evolving mobile communication standards such as Long Term Evolution (LTE) and 5G, the Software Defined Radio (SDR) concept provides great flexibility and efficiency. For many years, a high-end Digital Signal Processor (DSP) System on Chip (SoC) has been developed to support multicore and various hardware coprocessors. This paper introduces the implementation of the SDR platform hardware using TI's TCI663x chip. Using the platform, LTE transport channel is implemented by interworking multicore DSP with Bit rate Coprocessor (BCP) and Turbo Decoder Coprocessor (TCP) and the performance is evaluated according to various implementation options. In order to evaluate the performance of the implemented LTE transport channel, LTE base station system was constructed by combining FPGA main board for physical channels, SDR platform board, and RF & Antenna board.

A Design Method for Pre-Distortion Compensation of SAR Chirp Signal based on Envelop Sampling and Interpolation Filter (위성 탑재 영상레이다 첩 신호의 전치왜곡 보상을 위한 포락선 샘플링 및 보간 필터 기반의 설계 기법)

  • Lee, Young-Bok
    • Journal of the Korea Institute of Military Science and Technology
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    • v.25 no.4
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    • pp.347-354
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    • 2022
  • The synthetic aperture radar(SAR) is an equipment that can acquire images in all weathers day and night based on radar signals. The on-board processor of satellite SAR generates transmission signal by digital signal processing, converts it into an analog signal and transmits to antenna. Until the transmission signal generated by on-board processor is output, the signal passes the transmission cables and analog devices. At this time, these hardware distort the signal and makes SAR performance worse. To improve the performance, pre-distortion technique is used. But, general pre-distortion using taylor series is not sufficient to compensate for the distortion. This paper suggests transmit signal design method with improved pre-distortion. This paper uses envelop sampling method and interpolation filter for frequency domain compensation. The proposed method accurately compensates the hardware distortion and reduces resource usage of FPGA. To analyze proposed method's performance, IRF characteristics are compared when the proposed method applies to signal with errors.

An Implementation of the DSP-based Digital Radio Modiale Receiver (DSP 기반 DRM 수신기 구현)

  • Park, Kyung-Won;Kim, Sung-Jun;Seo, Jeong-Wook;Kwon, Ki-Won;Park, Se-Ho;Paik, Jong-Ho
    • IEMEK Journal of Embedded Systems and Applications
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    • v.3 no.4
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    • pp.235-243
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    • 2008
  • In this paper, a software-based Digital Radio Modiale(DRM) receiver is implemented on a Digital Signal Processor(DSP). DRM stands for the European radio broadcasting standard to bring AM radio into digital radio, designed to work at frequencies below 30MHz. DRM can offer various data services such as text messaging and slideshow services as well as audio services. The DRM receiver implemented on the Tensilica DSP core performs well at low signal strength indication of -102dBm.

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Digital control of active magnetic bearing using digital signal processor

  • Shimomachi, T.;Ishimatsu, T.;Taguchi, N.;Fukata, S.
    • 제어로봇시스템학회:학술대회논문집
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    • 1989.10a
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    • pp.760-765
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    • 1989
  • Digital control laws are implemented on an active magnetic bearing system with DSP. The results of tests using a experimental apparatus are (1) in a case that conventional PID, PIDD2 controls are employed, implemention of digital control law has similar characteristics to that of analogue control law. (2)The experiments reveal the results that the dynamic compensation based on the observer may be better than that of the other conventional controllers.

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